Untitled
Abstract: No abstract text available
Text: 74ACT11656 OCTAL BUFFER/LINE DRIVER WITH PARITY CHECKER/GENERATOR AND 3-STATE OUTPUTS SCAS460A – DECEMBER 1994 – REVISED APRIL 1996 D D D D D D DW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Combines ’244 and ’280 Functions In One Package
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74ACT11656
SCAS460A
500-mA
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Untitled
Abstract: No abstract text available
Text: SN54LS280, SN54S280, SN74LS280, SN74S280 9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS SDLS152 – DECEMBER 1972 – REVISED MARCH 1988 Copyright 1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments
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SN54LS280,
SN54S280,
SN74LS280,
SN74S280
SDLS152
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A048
Abstract: DM9348
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 03/30/99 Last Update Date: 07/30/99 Last Major Revision Date: 03/30/99 MNDM9348-X REV 1A0 12-Input Parity Checker/Generator General Description The '9348 is a 12-input parity checker/generator generating odd and even parity outputs.
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MNDM9348-X
12-Input
DM9348
DM9348J/883
DM9348W/883
MIL-STD-883,
M0003348
A048
DM9348
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54F280
Abstract: 54F280DMQB 54F280FMQB 54F280LMQB F280 M280
Text: MILITARY DATA SHEET Original Creation Date: 04/19/96 Last Update Date: 07/30/96 Last Major Revision Date: 04/19/96 MN54F280-X REV 1A0 9-Bit Parity Generator /Checker General Description The F280 is a high-speed parity generator/checker that accepts nine bits of input data and
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MN54F280-X
54F280
54F280DMQB
54F280FMQB
54F280LMQB
MIL-STD-883,
-55/125C
54F280
54F280DMQB
54F280FMQB
54F280LMQB
F280
M280
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54ACTQ657
Abstract: No abstract text available
Text: 54ACTQ657 Quiet Series Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE Outputs General Description Features The ACTQ657 contains eight non-inverting buffers with TRI-STATE outputs and an 8-bit parity generator/checker. Intended for bus oriented applications, the device combines
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54ACTQ657
ACTQ657
54ACTQ657
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54ACTQ657
Abstract: 54ACTQ657DMQB 54ACTQ657FMQB 54ACTQ657LMQB D657
Text: MILITARY DATA SHEET Original Creation Date: 07/16/96 Last Update Date: 09/11/96 Last Major Revision Date: 07/16/96 MN54ACTQ657-X REV 1A0 Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE Outputs General Description The ACTQ657 contains eight non-inverting buffers with TRI-STATE outputs and 8-bit parity
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MN54ACTQ657-X
ACTQ657
54ACTQ657
54ACTQ657DMQB
54ACTQ657FMQB
54ACTQ657LMQB
D657
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74F401
Abstract: 74F401PC 74F401SC CRC-12 CRC-16 M14A MS-001 N14A CRC 9401
Text: Revised August 1999 74F401 CRC Generator/Checker General Description Features The 74F401 Cycle Redundancy Check CRC Generator/ Checker provides an advanced tool for implementing the most widely used error detection scheme in serial digital data handling systems. A 3-bit control input selects one-ofeight generator polynomials. The list of polynomials
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74F401
74F401
CRC-16
74F401PC
74F401SC
CRC-12
M14A
MS-001
N14A
CRC 9401
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E160
Abstract: SY100E160 SY10E160 SY10E160JC
Text: 12-BIT PARITY GENERATOR/CHECKER DESCRIPTION FEATURES • Provides odd-HIGH parity of 12 inputs ■ Extended 100E VEE range of –4.2V to –5.5V The SY10/100E160 are high-speed, 12-bit parity generator/checkers with differential outputs, for use in new, high-performance ECL systems. The output Q takes
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12-BIT
SY10/100E160
SY10E160JC
J28-1
SY10E160JCTR
SY100E160JC
SY100E160JCTR
E160
SY100E160
SY10E160
SY10E160JC
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Untitled
Abstract: No abstract text available
Text: TC74ACT280P/F/FN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74ACT280P,TC74ACT280F,TC74ACT280FN 9-Bit Parity Generator/Checker Note: The TC74ACT280 is an advanced high speed CMOS 9-BIT PARITY GENERATOR fabricated with silicon gate and double-layer metal wiring C2MOS technology.
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TC74ACT280P/F/FN
TC74ACT280P
TC74ACT280F
TC74ACT280FN
TC74ACT280
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54F280DM
Abstract: 54F280FM 54F280LM 74F280 74F280PC 74F280SC 74F280SJ F280 J14A N14A
Text: 54F 74F280 9-Bit Parity Generator Checker General Description Features The ’F280 is a high-speed parity generator checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH If an even number of inputs is HIGH the Sum Even output is HIGH If an odd
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74F280
74F280PC
14-Lead
14-Lead
74F280SC
74F280SJ
54F280DM
54F280FM
54F280LM
74F280
74F280PC
74F280SC
74F280SJ
F280
J14A
N14A
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AC280
Abstract: CD54AC280F3A CD54ACT280F3A CD74AC280E CD74AC280M CD74ACT280E
Text: CD54/74AC280, CD54/74ACT280 Data sheet acquired from Harris Semiconductor SCHS250A 9-Bit Odd/Even Parity Generator/Checker August 1998 - Revised May 2000 Features data inputs is HIGH. Odd parity is indicated ∑O output is HIGH when an odd number of data inputs is HIGH. Parity
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CD54/74AC280,
CD54/74ACT280
SCHS250A
AC280,
ACT280
MIL-STD-883,
CD54AC280F3A
AC280
CD54AC280F3A
CD54ACT280F3A
CD74AC280E
CD74AC280M
CD74ACT280E
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Untitled
Abstract: No abstract text available
Text: SN54ABT833, SN74ABT833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS SCBS195C – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D D D SN54ABT833 . . . JT PACKAGE SN74ABT833 . . . DW OR NT PACKAGE TOP VIEW OEA A1 A2 A3 A4 A5 A6 A7 A8 ERR CLR GND A 9-bit parity generator/checker generates a
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SN54ABT833,
SN74ABT833
SCBS195C
MIL-STD-883,
JESD-17
32-mA
64-mA
SN54ABT833
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of ic 74180
Abstract: No abstract text available
Text: TYPES SN54180, SN74180 9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS D E C E M B E R 1 9 7 2 - R E V I S E D D E C E M B E R 1 9 83 S N 5 4 1 8 0 . . J O R W P A C K A G E SN 74180 . J O R N P A C K A G E T O P V IE W F U N C T IO N T A B L E OUTPUTS IN P U T S
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SN54180,
SN74180
of ic 74180
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s2599
Abstract: sn74180
Text: SN 54180, SN 74180 9 BIT ODD/EVEN PARITY GENERATORS/CHECKERS D E C E M B E R 1 9 7 2 - R E V lS E D M A R C H 1988 SN54180 . . . J OR W PACKAGE SN74180 . N PACKAGE TOP VIEW F U N C T IO N T A B L E O UTPUTS IN P U T S Z O F H ’s A T H ODD EVEN H L H L
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SN54180
SN74180
s2599
sn74180
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74F286
Abstract: SN74F286
Text: SN 54F286, SN 74F286 9-BIT PARITY GENERATORS/CHECKERS WITH BUS DRIVER PARITY I/O PORT D 2 9 3 2 , M ARC H 1 9 8 7 -R E V IS E D JA N U A R Y 1 9 8 9 SN 54F286 . . . J PACKAGE SN 74F286 . . . D OR N PACKAGE • Generates Either Odd or Even Parity for Nine Data Lines
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54F286,
74F286
300-mil
54F286
74F286
SN54F286
SN74F286
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Untitled
Abstract: No abstract text available
Text: Philips Semlconductors-Signetics FAST 74F280A, 74F280B Document No. 853-0363 ECN No. 99142 Date of issue March 191990 Parity Checker Generator Status Product Specification 9-Bit Odd/Even Parity Generator/Checker FAST Products FEA TU RES • High impedance NPN base inputs
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74F280A
74F280B
74F280A,
74F280B
500ns
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Untitled
Abstract: No abstract text available
Text: INTEGRATED T O SH IB A 9 -BIT TECHNICAL PARITY TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT CIRCUIT TC74AC280P/F/FN DATA SILICON MONOLITHIC GENERATOR/CHECKER The TC74AC280 is an advanced high speed CMOS 9 - BIT PARITY GENERATOR fabricated with silicon gate and double layer metal wiring C2MOS technology.
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TC74AC280P/F/FN
TC74AC280
14PIN
14PIN
200mil
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74AS280
Abstract: 54ALS280 500NT
Text: TE X A S IN ST R -CLOGICJ fil ~Q§Qf723 T E X A S De| 0^1753 IN S T R LOGIC 00420^ S |~ Df- Y S ~/7 81 Ç 4 2 8 9 6 SN54ALS280, SN54AS280, SN74ALS280, SN74AS280 9-BIT PARITY GENERATORS/CHECKERS D2661, DECEMBER 1982 - REVISED MAY 1986 SN 54A LS2 80, SN 5 4 A S2 8 0 . . . J PA C K A G E
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Qf723
SN54ALS280,
SN54AS280,
SN74ALS280,
SN74AS280
D2661,
300-mil
25-LIN
81-LINE
25-line
74AS280
54ALS280
500NT
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application of parity checker/generator
Abstract: PQO-10 F10170 F10570
Text: F1017Ö« F10570 11-INPUT PARITY CHECKER/GENERATOR D E S C R IP T IO N — T h e F 1 0 1 70 a n d F1 0 5 70 a re v e ry h ig h -s p e e d 1 1 -In p u t P a rity C h e c k e r /G e n e ra to rs . It is u s e fu l f o r d a ta p ro c e s s in g , m e m o ry a n d d a ta tr a n s m is s io n a p p lic a
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F1017Ã
F10570
F10170
F10570
11-lnput
Po0-10
PoO-10
PoO-10.
Po0-10)
Poo-10
application of parity checker/generator
PQO-10
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CMOS 4000B series device
Abstract: II-1-15 4000B 4531B
Text: 4531B 13-INPUT PARITY CHECKER GENERATOR DE SC R IP TIO N - The 4531 B is a 1 3 -In p u t Parity C hecker/G enerator w ith 13 Parity In p u ts l 0 - l 12 and a P a rity O u tp u t <Z). When the num ber of P a rity Inputs th a t are H IG H is even, the O u tp u t (Z) is
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4531B
13-INPUT
13-lnput
4000B
CMOS 4000B series device
II-1-15
4531B
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Z8000
Abstract: z8530 8086 logic diagram dc av converter Z8030 8086 interrupt structure 8086 structure interrupt structure of 8086 CRC-16 Z-636
Text: Z8030/Z8530 Serial Communications Controller DISTINCTIVE CHARACTERISTICS • Programmable Synchronous Modes - SDLC and HDLC, and SOLC loop supported with frame control, zero insertion and deletion, abort, a residue handling - CRC-16 and CCITT generators and checkers
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Z8030/Z8530
CRC-16
Z8000*
Z8030
Z8000
Z8030A
Z8530
Z8530A
8086 logic diagram
dc av converter
8086 interrupt structure
8086 structure
interrupt structure of 8086
Z-636
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4 bit odd parity checker
Abstract: 0539SA
Text: 906ZUIV Am2906 Quad Two-Input OC Bus Transceiver with Parity DISTINCTIVE CHARACTERISTICS • • • Internal 4-bit odd parity checker/generator. R eceiver has output latch for pipeline operation. R eceiver outputs sink 12 mA. Quad high-speed LSI bus transceiver.
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Am2906
100mA
5398A
0539SA
4 bit odd parity checker
0539SA
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"Parity Checker generator odd-even
Abstract: LS180 LS280 T54LS280D2
Text: T54LS280 T74LS280 9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS DESCRIPTION The T54LS280/T74LS280 is a universal 9-Bit OddEven Parity Generator/Checker. It is composed of odd/even outputs to facilitate either odd or even parity. By cascading, the word length can be easi
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T54LS280
T74LS280
T54LS280/T74LS280
LS280
LS180
"Parity Checker generator odd-even
T54LS280D2
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SN74ALVCH16901
Abstract: No abstract text available
Text: SN74ALVCH16901 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS S C E S 0 1 OB - J U L Y 1 9 9 5 - R E V IS E D N O V E M B E R 199 6 DGG PACKAGE TOP VIEW Member of the Texas Instruments Widebus+ Family E P IC ™ (Enhanced-Performance Implanted
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SN74ALVCH16901
18-BIT
SCES01
MIL-STD-883,
JESD-17
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