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    Nexperia BZX384-C33,115

    DIODE ZENER 33V 300MW SOD323
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    Rochester Electronics BZX384-C33,115 378,850 1
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    Avnet Silica BZX384-C33,115 189,000 8 Weeks 3,000
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    Nexperia BZT52H-C33,115

    DIODE ZENER 33V 375MW SOD123F
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    DigiKey BZT52H-C33,115 Cut Tape 7,722 1
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    Mouser Electronics BZT52H-C33,115 5,015
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    Rochester Electronics BZT52H-C33,115 27,000 1
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    EBV Elektronik BZT52H-C33,115 51,000 10 Weeks 3,000
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    Nexperia BZV90-C33,115

    DIODE ZENER 33V 1.5W SOT223
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    DigiKey BZV90-C33,115 Digi-Reel 4,171 1
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    Rochester Electronics BZV90-C33,115 20,000 1
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    Avnet Silica BZV90-C33,115 10 Weeks 1,000
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    Nexperia BZX84J-C33,115

    DIODE ZENER 33V 550MW SOD323F
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    DigiKey BZX84J-C33,115 Digi-Reel 3,771 1
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    Mouser Electronics BZX84J-C33,115 7,365
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    Avnet Silica BZX84J-C33,115 33,000 8 Weeks 3,000
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    EBV Elektronik BZX84J-C33,115 8 Weeks 3,000
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    Nexperia BZX585-C33,115

    DIODE ZENER 33V 300MW SOD523
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    DigiKey BZX585-C33,115 Cut Tape 2,989 1
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    Mouser Electronics BZX585-C33,115 62,251
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    C33115 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    L496D

    Abstract: 9l reset CY7C331 ST L11922 0423-J
    Text: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,


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    PDF CY7C331 28-pin CY7C331 -40TMB 28-Lead CY7C331â 40WMB 28-Lead 300-Mil) L496D 9l reset ST L11922 0423-J

    Untitled

    Abstract: No abstract text available
    Text: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin


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    PDF 28-pin 28-pin termW22 28-Lead 300-Mil) CY7C331 001305b

    C3317

    Abstract: L1190 CY7331
    Text: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all


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    PDF 28-pin 28-Lead 28-Lead 300-Mil) CY7C331 0Dlb56b C3317 L1190 CY7331

    Untitled

    Abstract: No abstract text available
    Text: CY7C331 CYPRESS — . = SEMICONDUCTOR Asynchronous Registered EPLD T\velve I/O macrocells each having: — One state flip-flop with an XOR sura-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set,


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    PDF CY7C331 28-pin

    EI24

    Abstract: GI05 st C331 n 332 ab EI-24
    Text: _ ~ 2 r CY7C331 •^CYPRESS Features • 13 inputs, 12 feedback I/O pins, plus 6 • Twelve I/O macrocells each having: — One stale flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set,


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    PDF CY7C331 reset7C331 --30TM 31--30W 331--40D --40H 331--40LM 331--40Q EI24 GI05 st C331 n 332 ab EI-24

    2SUR

    Abstract: CY7C331 L1190 C3317
    Text: CY7C331 ¿F C Y P R E S S Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set, reset, and clock inpnts on all


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    PDF CY7C331 28-pin 40HMB CY7C331â 40LMB 28-Square 40QMB 2SUR L1190 C3317

    Untitled

    Abstract: No abstract text available
    Text: CY7C331 CYPRESS ~ = SEMICONDUCTOR Asynchronous Registered EPLD Functional Description IWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input T h e CY7C331 is the m ost versatile PLD available for asynchronous designs. C en­


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    PDF CY7C331 28-pin 28-Lead 28-Lead 300-M

    Untitled

    Abstract: No abstract text available
    Text: CY7C331 CYPRESS Features • • Twelve I/O m acrocells each having: — O ne state flip-flop w ith an X OR su m -of-p rod u cts input — O ne feed b ack flip -flop w ith input com in g from the I/O pin — In d ep en d en t p rod uct term set, reset, and clock in p u ts on all


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    PDF CY7C331 CY7C331

    7c331

    Abstract: c33115
    Text: 7C331:1/92 Revision: December 1992 fax id: 6016 CY7C331 V CYPRESS Asynchronous Registered EPLD • Low power Features — 90 mA typical lcc quiescent • Twelve I/O macro cel Is each having: — One state flip-flop with an XOR sum-of-products input — 180 mA lcc maximum


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    PDF 7C331 28-pights. CY7C331 28-Lead 300-Mil) MIL-STD-1835 15Config c33115