BYPASS ZERO IN MULTIPLICATION Search Results

DAC-08BC

Abstract: DAC08BC datel DAC-08 DAC-08 DAC-08BM
Contextual Info: DAC-08B High Speed, 8-Bit Monolithic DigitaMo-Anaiog Converter FEATURES • • • • • • 85 Nanoseconds settling time - 1 0 to + 18V compliance ± 4 .5 to ±18V supply 8-Blt resolution 1- or 2-Quadrant multiplication Low cost GENERAL DESCRIPTION The DAC-08BC and DAC-08BM provide

weitek xl-3132

Abstract: XL-8137 XL-3132 weitek 3332-100 3332 weitek weitek 2264 weitek 3332-G weitek 3132 XL-8136
Contextual Info: üJEITEK CÔRP GS WEITEK Jk A D E B IbbBflab DOOOiib < WTL 3132/WTL 3332 XL-3132 32-BIT FLOATING POINT DATAPATH PRELIMINARY DATA October 1987 The WEITEK WTL 3132, WTL 3332, and XL-3132 single-chip floatingpoint datapathseachoffer a full instruction set, includingmulti­

AN237

Abstract: IDT5T9821 VFQFP 5T9821
Contextual Info: IDT5T9821 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER IDT5T9821 FEATURES: DESCRIPTION: • 2.5 VDD • 6 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

AN237

Abstract: IDT5T9820 5T9820
Contextual Info: IDT5T9820 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER IDT5T9820 FEATURES: DESCRIPTION: • 2.5 VDD • 5 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

IDT5T9821

Abstract: 5T9821
Contextual Info: IDT5T9821 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER FEATURES: IDT5T9821 DESCRIPTION: • 2.5 VDD • 6 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

5T9820

Contextual Info: IDT5T9820 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER FEATURES: IDT5T9820 DESCRIPTION: • 2.5 VDD • 5 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

IDT5T9820

Abstract: 5T9820
Contextual Info: IDT5T9820 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL CLOCK DRIVER FEATURES: IDT5T9820 DESCRIPTION: • 2.5 VDD • 5 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

5T9821

Contextual Info: IDT5T9821 EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER FEATURES: IDT5T9821 DESCRIPTION: • 2.5 VDD • 6 pairs of outputs • Low skew: 100ps all outputs at same interface level, 250ps all

K02000

Contextual Info: November 2006 LMK02000 Precision Clock Conditioner with Integrated PLL General Description Features The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high

LMK02002

Abstract: LMK02002ISQ LMK02002ISQX PUMP01
Contextual Info: August 2007 LMK02002 Precision Clock Conditioner with Integrated PLL General Description Features The LMK02002 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high

Contextual Info: 19-0168; Rev 1; 11/93 A M X IV M +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC Internal gain-setting resistors can be used to define a DAC output voltage range of 0V to + 2 .048V, 0V to +4.096V, or ±2.048V. Four-quadrant multiplication is pos­

k020

Contextual Info: LMK02000 Precision Clock Conditioner with Integrated PLL General Description Features The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high

LMK02000

Abstract: LMK02000ISQ LMK02000ISQX K02000
Contextual Info: LMK02000 Precision Clock Conditioner with Integrated PLL General Description Features The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high

K03000CI

Abstract: LMK03000 LMK03000C LMK03001 LMK03001C LMK03000CX
Contextual Info: November 2006 LMK03000/LMK03000C/LMK03001/LMK03001C Precision Clock Conditioner with Integrated VCO General Description Features The LMK03000/LMK03000C/LMK03001/LMK03001C precision clock conditioners combine the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The devices integrate a Voltage Controlled

CYN70

Abstract: CDCVF25084 MTSS001C
Contextual Info: CDCVF25084 3.3-V 1:8 ZERO DELAY PLL x4 CLOCK MULTIPLIER SCAS690A – APRIL 2003 – REVISED MAY 2003 D Phase-Locked Loop-Based Multiplier by PW PACKAGE (TSSOP) (TOP VIEW) Four D Input Frequency Range: 2.5 MHz to 45 MHz D Output Frequency Range: 10 MHz to

LF3370

Abstract: CF120
Contextual Info: LF3370 LF3370 DEVICES INCORPORATED High-Definition Video Format Converter High-Definition Video Format Converter DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 83 MHz Data Rate for HDTV Applications ❑ Supports Multiple Video Formats Bi-Directional Conversions:

6647a

Abstract: uhf microwave fet 560-7A50 Logarithmic Amplifier detector 18GHz metal detector vlf 2082-2700-00 2082-2700 7082 coil gold detector decibel meter
Contextual Info: Introduction to Microwave Capacitors Microwave Capacitors in MICs Typical Microwave Circuit Applications Microwave MLC, SLC, or Thin-Film capacitor applications in MIC circuits can be grouped into the following categories: • DC Block in series with an MIC transmission line

ICS5342

Contextual Info: ICS5342 GENDAC 16-Bit Integrated Clock-LUT-DAC General Description Features The ICS5342 GENDAC is a combination of dual programmable clock generators, a 256 x 18-bit RAM, and a triple 8-bit video DAC. The GENDAC supports 8-bit pseudo color applications, as well as 15-bit, 16-bit, and 24-bit True Color bypass

6647a

Abstract: 2082-2700-00 560-7A50 attenuator 3dB DC 18GHz wiltron 6647A Microwave Generator SWR BRIDGE metal detector vlf HP-85
Contextual Info: Introduction to Microwave Capacitors Microwave Capacitors in MICs Typical Microwave Circuit Applications Microwave MLC, SLC, or Thin-Film capacitor applications in MIC circuits can be grouped into the following categories: • DC Block in series with an MIC transmission line

D1232

Contextual Info: DATA SHEET Freescale Semiconductor Technical Data LVCMOS V/2.5 V 1:11 3.3 Zero Delay Clock Generator 3.3 V/2.5 V 1:11 LVCMOS Zero The MPC9352 is a 3.3 V or 2.5 V compatible, 1:11 PLL based clock generator targeted for high performance clock tree applications. With output frequencies up

AN1091

Abstract: MPC9352
Contextual Info: DATASHEET MPC9352 3.3V/2.5V 1:11 LVCMOS ZERO DELAY CLOCK GENERATOR 3.3 V/2.5 V 1:11 LVCMOS Zero Delay Clock Generator The MPC9352 is a 3.3 V or 2.5 V compatible, 1:11 PLL based clock generator targeted for high performance clock tree applications. With output frequencies up

LVDS 35-bit SSC

Abstract: "programmable clock" i2c AN-234 IDT5T9820 IDT5T9821 IDT5T9890 IDT5T9891 5T9820 5T9821 5T9890
Contextual Info: APPLICATION NOTE AN-234 PROGRAMMABLE CLOCK APPLICATION NOTE APPLICATION NOTE AN-234 PROGRAMMABLE CLOCK APPLICATION NOTE TABLE OF CONTENTS FEATURES DESCRIPTION The devices have redundant clock inputs, and each input can support either single-ended or differential types. The device also supports input clock

CY2071A

Abstract: CY2081 CY2305 CY2308 CY2308-1 CY2308-2 CY2308-3 CY2308-4 CY2309
Contextual Info: fax id: 3615 CY2308: Zero Delay Buffer Introduction to Cypress Zero Delay Buffers What is a Zero Delay Buffer? the loop and form a simple zero delay buffer. Loading on the output which is fed back can be used for simple lead or lag adjustments as detailed in the section “ Lead or Lag Adjustment”. Certain amount of lead/lag or output-output skew

cvhd-950

Abstract: ad9524 block diagram of energy saving 0xA06 Crystek CVHD JESD51-2
Contextual Info: Low Jitter Clock Generator with 6 LVPECL/LVDS/HSTL/13 LVCMOS Outputs AD9524 FEATURES APPLICATIONS LTE and multicarrier GSM base stations Wireless and broadband infrastructure Medical instrumentation Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs Low jitter, low phase noise clock distribution