BWSE Search Results

BWS05SX-PU

Abstract: EN55022B
Contextual Info: AC/DC SWITCHING POWER SUPPLY INPUT: 85~264VAC SINGLE OUTPUT 10 WATTS BWS/BWSE-SX-U SERIES General Description BW-Series are open-board, low profile, low price switcher without chassis and cover. It is designed for small size and low cost applications worldwide. The output power can be boosted 15% to

FEP300P

Abstract: BYY26-1 BYY26 FES160T BYV 20f 8YV27-2DO BYy27 UF540I Gw260 FEP300
Contextual Info: LOW TO MEDIUM CURRENT AXIAL FAST EPITAXIAL RECTIFIERS UGOU dm U0060 UG1A in U010 PACKAGE MPG06 DO-2D4AL » A VU 0M 0.6 1.0 UGNA TYPE VFklQOM VfelttM VUOOM VUOOM vfMom VWflOM vMoom VM M VhlttOM *r H RElD 0W 04AP 91001 Hn GltOM 8YV260 tin BWSE UG2A ihm UQJD

oscillator LC 1khz-10khz

Abstract: oscillator 1khz-10khz 482-L
Contextual Info: SY89482L 3.3V, 622MHz to 694MHz CML Jitter Attenuator with Internal Termination General Description The SY89482L is a 3.3V, fully differential CML jitter attenuator that accepts a noisy clock between 622MHz and 694MHz, and provides an ultra-low jitter of the input

silec

Abstract: GR-1244-CORE OC192 Si5364 Si536
Contextual Info: Si5364 SONET/SDH P R E C I S I O N P O R T C A R D C L O C K IC Features Ultra-low jitter clock outputs with jitter generation as low as 0.3 psRMS No external components other than a resistor and standard bypassing Up to three clock inputs Four independent clock outputs at 19,

FDN337N

Abstract: 1729018 BLM31A601S LN1271RAL Si5318 3528 IC circuit diagram Si5318-A-BC C0603C0G500-220KNE
Contextual Info: Si 5 3 1 8 - EVB EVALUATION BOARD FOR Si5318 SONET/SDH PRECISION CLOCK MULTIPLIER IC Description Features The Si5318-EVB is the customer evaluation board for the Si5318 SONET/SDH Precision Port Card Clock IC. This board is supplied to customers for evaluation of the

IPC-SM-782

Abstract: JESD78 MO-220 Si5322
Contextual Info: Si5322 P R E L I M I N A R Y D A TA S H E E T PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER Description Features The Si5322 is a low jitter, precision clock multiplier for high-speed communication systems, including SONET OC-48/OC-192, Ethernet, and Fibre Channel. The

S6 67A

Abstract: galena motorola 401 siemens s5 IM 314 IM 304 7400 pin configuration k 4212 Minco Technology Labs motorola 68000 block diagram motorola 68000 watchdog SCR bt 107
Contextual Info: Microprocessors and Memory Technologies Group MC68LC302 Low Power Integrated Multiprotocol Processor Reference Manual Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding

BB209

Abstract: CYM52KNP72V33A-10BBC CYM52KNP72V33A-13BBC CYM52KNP72V33A-15BBC
Contextual Info: PRELIMINARY CYM52KNP72AV33 512Kx72 Pipelined MCM with NoBL Architecture Features • No Bus Latency, no dead cycles between write and read cycles • Internally synchronized registered outputs eliminate the need to control OE • Single 3.3V –5% and +5% power supply VDD

SEIWG-005

Abstract: 1200VM vhf antenna mtbf SEIWG-005A LEMO WIRELESS BASE STATION STAR1200VM transceiver fsk baud carrier uhf base station RF front end
Contextual Info: STAR 1200VM Specification STAR 1200VM Base Station Specification Revision 2.7 November 13, 1997 Nova Engineering, Inc. 5 Circle Freeway Drive Cincinnati, Ohio 45246 Phone: 513-860-3456 Fax: 513-860-3535 www.nova-eng.com STAR 1200VM Specification 1 . Introduction

Contextual Info: Si5321 SONET/SDH PRECISION CLOCK MULTIPLIER IC FEATURES • Ultra-low jitter clock output with jitter generation of 0.25 psRMS typ for OC-192 • Accepts clock input centered at 19, 39, 78, 155, 311 or 622 MHz • Selectable clock output centered at 19, 39,

80C186

Abstract: R8822I
Contextual Info: RDC R8822I RISC DSP Communication 16-BIT RISC MICROCONTROLLER R8822I Brief Sheet 16-BIT RISC MICROCONTROLLER Specifications subject to change without notice, contact your sales representatives for the most update information. Page 1 of 5 REV 1.0 Jul.7 2006

CY7C1470BV33

Contextual Info: CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™

SI5375

Abstract: Silicon Labs Clock vs. Oscillator Si537xDSPLLsim
Contextual Info: Si5375 4-PLL A NY - F REQUENCY P RECISION C LOCK M ULTIPLIER /J I T T E R A TTENUA TOR Features       Highly integrated, 4–PLL clock  multiplier/jitter attenuator Four independent DSPLLs support any-frequency synthesis and jitter 

CR0402-16W-000T

Abstract: 74sz14 C0603X7R160-104KNE B-01 Si5364 Si5364-EVB F-OSA u735
Contextual Info: Si5364-EVB E V A L U A T I O N B O A R D F O R Si 5 36 4 S O N E T / S D H P R E C I S I O N PORT CARD CLOCK IC Description Features The Si5364-EVB is the evaluation board for the Si5364 SONET/SDH Precision Port Card Clock IC. This evaluation board provides access to all signals

LQFP-48

Abstract: RF2908 BJT phase shift oscillator C4468 9048 capacitor
Contextual Info: RF2908 11 915MHZ SPREAD SPECTRUM RECEIVER WITH PLL FREQUENCY SYNTHESIZER Typical Applications • Digital Cordless Telephones • Inventory Tracking • Secure Communication Links • Wireless Security • Wireless LANs • Battery Powered Applications Product Description

BA1405

Abstract: 1N1307
Contextual Info: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MC68PM302 Integrated Multiprotocol Processor with PCMCIA Reference Manual  1995 Motorola, Inc. All Rights Reserved For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc.

d2s 28 diode

Abstract: ic DPD photodiode dvd cd DVD focus detection photodetector BD109 Analog ID n5217 dvd servo control ic DPD adaptive algorithm dpd
Contextual Info: Features • • • • Operating Supply Range 3.0V to 3.6V Power Dissipation 1W Max Low-power Sleep Mode <0.5 mW RF Data Channel – Automatic Gain Control or Programmable Gain Mode – Wide Bandwidth VGA – VGA Accepts Inputs from 30 - 300 mV Peak-to-Peak Differential (PPD),

Si5320

Abstract: Si5320-BC Si5321 Si5321-BC Si5364
Contextual Info: Precision Clocking Solutions SONET/SDH CLOCK MULTIPLIERS/JITTER ATTENUATORS KEY PRODUCTS Si5364 Port Card Clock IC • Stratum compliant hitless switching among three 19.44 MHz clock inputs • Jitter generation less than 0.3 psRMS OC-192 • Jitter attenuation with programmable

CY7C1461V25

Abstract: CY7C1463V25 CY7C1465V25
Contextual Info: CY7C1461V25 CY7C1463V25 CY7C1465V25 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-Thru SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between Write and Read cycles •Supports 133-MHz bus operations •1M x 36/2M × 18/512K × 72 common I/O

C4460

Contextual Info: RF2908 Preliminary
             

      • Digital Cordless Telephones • Inventory Tracking • Secure Communication Links • Wireless Security • Wireless LANs • Battery Powered Applications


Contextual Info: a FEATURES 60 MSPS Sampling Rate 9.3 Effective Number of Bits at fIN = 10.3 MHz 250 mW Total Power at 60 MSPS Selectable Input Bandwidth of 50 MHz or 130 MHz On-Chip T/H and Voltage Reference Single 5 V Supply Voltage 5 V or 3 V Logic I/O Compatible Input Range and Output Coding Options Available

MAX3274

Contextual Info: Design Note: HFDN-20.0 Rev 0; 05/02 MAX3274 Optimizes Dual-Rate, Fibre Channel Receivers MAXIM High-Frequency/Fiber Communications Group Maxim Integrated Products 3hfdn200.doc 05/03/02 MAX3274 Optimizes Dual-Rate, Fibre Channel Receivers 1 Introduction This discussion explores the need to suppress the

Si5020

Abstract: Si5100 Si5110 OC-48 STM-16 OC-48 Clock and data recovery
Contextual Info: OC-48 Optical Networking Solutions HIGH PERFORMANCE PHYSICAL LAYER ICS KEY PRODUCTS Si5100/10 Transceivers • Data rates supported: OC-48/STM-16 and 2.7 Gbps FEC • Integrated limiting amplifier, CDR, CMU and Mux/Demux • DSPLL-based CMU with selectable loop

AN411

Abstract: Si5338 4042AS AVAR PICAL 2 refcl
Contextual Info: A N 4 11 C ONFIGURING T H E Si5338 1. Introduction The Si5338 is a highly flexible and configurable clock generator/clock buffer. A block diagram of the Si5338 is shown in Figure 1. 7, 24 Optional XTAL IN1 IN2 VDD Si5338 20 Osc MultiSynth ÷M0 1 22 ÷R0 16