BRAM Search Results

SPARTAN-3e microblaze

Abstract: DS452 vhdl code for bram lmb bus timing
Contextual Info: LMB BRAM Interface Controller v2.10b DS452 April 24, 2009 Product Specification Introduction LogiCORE Facts This document provides the design specification for the Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller. The LMB BRAM Interface Controller connects to an

74069N

Abstract: 64069N 74069 cemi
Contextual Info: ¡Mí U N I T R R ISSI CEMI 74069N M C Y 64069N M C Y Szeáciokrotny ¡nw erter SSI, CMOS Bramka aluminiowa Obudowa CE 70 Uktad wyprowodzeA U DD ful |Î3l p2l íñl F51 m [71 •>fOi -o ■> _ [>l Jss 74069 Parametry dopuszczalne /üss » o y/ Wartoáó

sappi

Contextual Info: \ iK f iU N I T R R 1=1 OEM I MC 1203N M C 1203N A M C 1203NB Uktad zegarowy wspótpracujqcy z wyáwietlaczem LCD LSI PM OS Bramka aluminiowa Uklady programowanego zegara,wBp<52praouJqo z wyéwietlaozea LCD i rezonatorea kwaroowym o ozgstotliwoóoi 32,768 kHz /21^ Hz/, spelniaj^ nastgpujqoe funkoje:

Contextual Info: 8 COPYRIGHT TRP connector ALL RIGHTS R E V I S I ONS RESERVED p LTR DESCRIPTION CHANGE C MATER o FLAMMAB C BRASS c POCO DWN 15APR2013 GZ APVD KZ o um um BRONZE c um SED EM um um LENS, SARBON 9 n 9 um 0 um A BOARD um o o o c DATE BRAME um c TEM. R OB B AS E MPEDANCE:

UCA6400

Abstract: UCY7400N UCA6404 UCA6400N UCY7404N UCY7400 UCY7404 UCA6410N UCA6420N UCA6430N
Contextual Info: CHARAKTERYSTYKI BRAMEK UCY7400N, UCY7404N, UCY7410N, UCY7420N, UCY7430N, UCY7440N, UCA6400N UCA6404N UCA6410N UCA6420N UCA6430N UCA6440N U ^Z /tV Ta =25°C Ucc 1 = 4,75 V Ucc(2)=5,00 V — N = 10 fc MHz Pammetry U6 = 5V impulsów tw 500nssunchron. } u h = 10ns

74s405

Abstract: 74S405N ot07 T01A ucy 74s405 74S40
Contextual Info: U N IT R O CEMI UCY 74S405N Dekoder binarny 1 z 8 Bipolarny oyfrowy ukiad eoalony TTL-S peini ftmkoJq binarnego dokodera 1 z 8 systemi mìkroprooesorowego wykorzystuj^oego Jednostk§ centralnq MCY 788Oli. Ukiad byó uiyty do rozszerzenia eystemu nlkroprooeeorowego eawieraj^oego bramy WeJéole/WyJéoie

d5200c

Abstract: RAMB16BWER vhdl code SECDED Xilinx ISE Design Suite 14.2 XC6SLX45T RAMB18E1
Contextual Info: LogiCORE IP AXI Block RAM BRAM Controller (v1.03a) DS777 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP AXI Block RAM (BRAM) Controller is a soft IP core for use with the Xilinx Vivado™ Design Suite, Embedded Development Kit

Contextual Info: m &^yy/ w B ^ y y y u - x Mono Color Lamps/ Bluish-Green Lamp Series 1 mm • 0 5 Round type ♦Viewing angle 30° * # a t l l R ound 9 W - P 3 C f3g é lÔ U illiiî î i'i Unit: mm '¿ R e f e r e n c e v a lu e Round Lamp/Mono mmm iê&fJS^ÀÈfë/ A b s o lu te Brami m m u

74HC133

Abstract: prad
Contextual Info: 13 wejéciowa bramka NAND u Spelnla funkcjg w algebrze Boolee y = A * B ^ a D ^ E * F * G * H * ,* ^ K * L * M lub LTL Y = A +B +C +D +E +F +G +H +Í+J +K +L+M Bezwzglqdna max. wartoáé w normalnych warunkach pracy Tabela funkcji NapiQcie zasifania. do 7V

TRIAC 97A6

Abstract: S0805BH 13003 TRANSISTOR TO220 equivalent triacs bt 804 600v Triac bt 808 600C Diode SOT-23 marking 15d zener diode 1N PH 48 6Bs smd transistor Z0409MF equivalent BT 808 600C
Contextual Info: Central Semiconductor Corp. Represented iSIGNTBOHICS B y: TORONTO I Regan Road, Unit 13, Bram pton, O ntario L7A 1B8 Tel: 905-846-1100 Fax:905-846-7116 E -m a il: d e s ig n tr< a id ire c t.c o m OTTAW A 21 Pine Bluff Trail, Stittsville, O ntario K2S 1E1

Contextual Info: M62486A VERY FAST CMOS 32K x 9 CACHE BRAM ADVANCE DATA 32K x 9 CMOS SYNCHRONOUS BURST SRAM FAST CYCLE TIMES: 15, 20ns FAST ACCESS TIMES: 11, 12, 14ns Max ON-BOARD BURST COUNTER INPUT REGISTERS ADDR.,DATA,CTRL SELF-TIMED WRITE CYCLE THREE STATE COMMON I/O

Contextual Info: SGS-THOMSON MK62940 M œ [IL i© T M P l g S VERY FAST CMOS 32K x 9 CACHE BRAM ADVANCE DATA • 32Kx 9 CMOS SYNCHRONOUS BURST SRAM ■ FAST CYCLE TIMES: 25, 30ns ■ FAST ACCESS: 19, 24ns Max - ON-BOARD BURST COUNTER ■ INPUT REGISTERS (ADDR.,DATA,CTRL

DS420

Abstract: vhdl code for bram
Contextual Info: PLB Block RAM BRAM Interface Controller DS420 (v1.4.1) July 29, 2003 Product Overview Introduction LogiCORE Facts The PLB BRAM Interface Controller is a module that attaches to the PLB (Processor Local Bus). This controller supports the PLB V3.4 byte enable architecture. Any access size up to the width of the PLB data bus is

Q0-Q31

Abstract: AI01756
Contextual Info: C T SGS-THOMSON *JW» SlD g[S®[l[LiOT®li[Kgi M63532P 32Kx32 PIPE-LINED BRAM LOW VOLTAGE CACHE BURST SRAM PRELIMINARY DATA • 32KX32 SYNCHRONOUS SRAM ■ LOW VOLTAGE: 3.3V ± 0.3V ■ PIPE-LINED OUTPUT REGISTERS SUPPORTS 3-1-1-1 CACHE BURST LINE FILLS

Contextual Info: SGS-THOMSON MK62486 ILO VERY FAST CMOS 32K x 9 CACHE BRAM ADVANCE DATA • 32K x 9 CMOS SYNCHRONOUS BURSTSRAM ■ FAST CYCLE TIMES: 25, 30ns ■ FAST ACCESS: 19, 24ns Max ■ ON-BOARD BURST COUNTER ■ INPUT REGISTERS ADDR.,DATA,CTRL ■ SELF-TIMED WRITE CYCLE

74073

Abstract: 74000N CI 7408 7408 hct 74002N 74081 64011N 64025n 74001 74011
Contextual Info: U NITRO M C Y 74000N MCY 64000N CEMI Dwukrotrva 3-wej¿c¡Ovva bramka NOfl + inwerter Seria logiczaych bramek przeznaczonych do pracy » syatemach cyfrowych gdzie vjymagane aqj niski pobdr mocy i/lub wysoka odpornosd na zakîocenia. Charak1:eryzuje siç buforowaflymi wej sciami i wyjseiami oraz symetrycznymi oharakterystykami wyjàciowymi w stallie nisklm i wyaokim.Typowa obcÍQ¿alnos<5 wynoai. - dwa wejscia TTL-L lub jedno TTL-LS.

CallPilot

Contextual Info: News Release www.nortelnetworks.com FOR IMMEDIATE RELEASE April 27, 1999 Nortel Networks Reports Record First Quarter Results • Revenues Up 26% to US$4.4 Billion • EPS From Operations Up 22% to US$0.33 BRAMPTON, Ontario –– Nortel Networks* [NYSE: NT/TSE: NTL] today reported results

Contextual Info: 7-31-01 From: AMP FAX To i Dawn Branson 12:34pm p. 3 of 4 From: AMP FAX To : Dawn Bramson o H I S Q B A M iN g IS UNPUBLISHED. [ LOC R E LE A S E D FO R P U B L IC A T IO N m CÛPrBiaHT TB 7-31-01 AMP 1NC0I«»1TBD. OI9T AD U.L INTERNAT IBN*L BlflHTB HMBBWgD.

Cyrix 6x86

Contextual Info: M63532P 32Kx32 PIPE-LINED BRAM LOW VOLTAGE CACHE BURST SRAM PRELIMINARY DATA 32Kx32 SYNCHRONOUS SRAM LOW VOLTAGE: 3.3V ± 0.3V PIPE-LINED OUTPUT REGISTERS SUPPORTS 3-1-1-1 CACHE BURST LINE FILLS FAST CYCLE TIMES: 75, 66, 60MHz CLK to DATA ACCESS: 7, 8, 9ns Max

tagram 8k

Abstract: K940
Contextual Info: 5 7 . SGS-THOMSON MK62940 io VERY FAST CMOS 32K x 9 CACHE BRAM • 32Kx 9 CMOS SYNCHRONOUS BURST SRAM ■ FAST CYCLE TIMES: 25, 30ns ■ FAST ACCESS TIMES: 19, 24ns Max ■ ON-BOARD BURST COUNTER ■ INPUT REGISTERS ADDR.,DATA,CTRL ■ SELF-TIMED WRITE CYCLE

M6294

Contextual Info: 5 7 . S G S -IH O M S O N M62940A VERY FAST CMOS 32K x 9 CACHE BRAM ADVANCE DATA • 32Kx 9 CMOS SYNCHRONOUS BURST SRAM ■ FAST CYCLE TIMES: 15, 20ns ■ FAST ACCESS TIMES: 11, 12, 14ns Max ■ ON-BOARD BURST COUNTER ■ INPUT REGISTERS ADDR.,DATA,CTRL

BT 4840

Abstract: crown 4888 composante electronique ET 439 weston 461 compagnie et 455 renault serie 713 et 131
Contextual Info: Corporation Nortel Networks 8200, chemin Dixie, bureau 100 Brampton Ontario L6T 5P6 • Canada Frank C. Carlucci Président du Conseil Le 13 mars 2000 À tous les actionnaires, Madame, Monsieur, Au nom du Conseil d’administration et de la direction de la Corporation Nortel

Contextual Info: 8 COPYRIGHT TRP connector ALL RIGHTS REVISIONS RESERVED p LTR DESCRIPTION LOGO CH A N G E 5 O oc DATE DWN 20ARR2013 GZ APVD KZ . I NG : BRA um o um BRONZE EMI o o um um um o SED WITH EENS, um 2 CARBON BRAME c um o um OR o :u m WITH HURE um BASE c -OPEN

vhdl code for bram

Abstract: DS444 PowerPc405 DS447 DS4470
Contextual Info: Data-Side OCM BRAM BRAM Interface Controller (v3.00c) DS447 June 24, 2009 Product Specification Introduction LogiCORE IP Facts The Data-Side OCM BRAM (BRAM) Interface Controller connects a BRAM Block to the data-side onchip memory (DSOCM) bus in a PowerPC 405-based