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    BOX655303 Search Results

    BOX655303 Datasheets Context Search

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    d3376

    Abstract: 74AC11828
    Contextual Info: 54AC 11828, 74AC11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS TI0156— D 3376, NOVEMBER 1909— REVISED MARCH 1990 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers S4AC11828 . . . JT PACKAGE 74AC11828 . . . DW OR NT PACKAGE TOP VIEW


    OCR Scan     		74AC11828 10-BIT TI0156-- 500-mA 300-mil S4AC11828 74AC11828 d3376 PDF

    qk 69 snd

    Abstract: D2987
    Contextual Info: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER D2957, JULY 1989 - REVISED A P R IL 1993 DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin V c c and GND Pin Configurations Minimize High-Speed Switching Noise


    OCR Scan     		74AC11158 D2957, 500-mA 300-mil qk 69 snd D2987 PDF

    SRPS019

    Abstract: pal16r8 programming algorithm ps019 TIBPAL16R8-20
    Contextual Info: TIBPAL16L8-15C, TIBPAL16R4-15C, TIBPAL16R6-15C, TIBPAL16R8-15C TIBPAL16L8-20M, TIBPAL16R4-20M, TIBPAL16R6-20M, TIBPAL16R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS019 - D3340, FEBR UARY 1984 - REVISED M ARCH 1992 TIBPAL16L8' C SUFFIX . . . J OR N PACKAGE


    OCR Scan     		TIBPAL16L8-15C, TIBPAL16R4-15C, TIBPAL16R6-15C, TIBPAL16R8-15C TIBPAL16L8-20M, TIBPAL16R4-20M, TIBPAL16R6-20M, TIBPAL16R8-20M SRPS019 D3340, pal16r8 programming algorithm ps019 TIBPAL16R8-20 PDF

    SN74ALVCH16260

    Contextual Info: SN74ALVCH16260 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS SCES046-JULY 1995 Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds


    OCR Scan     		SN74ALVCH16260 12-BIT 24-BIT SCES046-JULY MIL-STD-883C, JESD-17 SN74ALVCH16260 PDF

    LPD-D

    Abstract: sk2 354 SN74ABT3613 D1D1240
    Contextual Info: SN74ABT3613 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING S C B 51 28 C - JULY 1992 - RE V IS E D M ARCH 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 x 36 FIFO Buffering Data From Port A to Port B Mailbox Bypass Registers In Each


    OCR Scan     		SN74ABT3613 SCB5128C LPD-D sk2 354 SN74ABT3613 D1D1240 PDF

    TLC271 equivalent

    Abstract: Tlc2711 TLC271 HB F 2480 TIC27 TLC271C DT317
    Contextual Info: TLC271, TLC271A, TLC271B LinCMOS PROGAMMABLE LOW-POWER OPERATIONAL AMPLIFIERS SI.OS090A - NOVEMBER 1987 - REVISED AUGUST 1994 D, JG, OR P PACKAGE CTOP VIEW Input Offset Voltage D r ift. . . Typically 0.1 |xV/Month, Including the First 30 Days Wide Range of Supply Voltages Over


    OCR Scan     		TLC271, TLC271A, TLC271B OS090A SLQS090A- TLC271 equivalent Tlc2711 TLC271 HB F 2480 TIC27 TLC271C DT317 PDF

    T1BPAL16L8

    Abstract: tibpal16l8 PAL16R48 PAL16L8A tibpal16r8 TIBPAL16L8-25C TIBPAL16L8-30M TIBPAL16R4-25C TIBPAL16R4-30M TIBPAL16R6-25C
    Contextual Info: TIBPAL16L8-25C, TIBPAL16R4-25C, TIBPAL16R6-25C, TIBPAL16R8-25C TIBPAL16L8-30M, TIBPAL16R4-30M, TIBPAL16R6-30M, TIBPAL16R8-30M LOW-POWER HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS020 - D3337. FEBRUARY 1984 - REVISED MARCH 1992


    OCR Scan     		TIBPAL16L8-25C, TIBPAL16R4-25C, TIBPAL16R6-25C, TIBPAL16R8-25C TIBPAL16L8-30M, TIBPAL16R4-30M, TIBPAL16R6-30M, TIBPAL16R8-30M 8RPS020 D3337, T1BPAL16L8 tibpal16l8 PAL16R48 PAL16L8A tibpal16r8 TIBPAL16L8-25C TIBPAL16L8-30M TIBPAL16R4-25C TIBPAL16R4-30M TIBPAL16R6-25C PDF

    D3790

    Contextual Info: b3E D TEXAS INSTR LOGIC • 6 ^ 1 7 2 3 DD^lbb? 164 B T I I 3 SN54ABT2953, SN74ABT2953 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS _ D3790, FEBRUARY 1991-REVISED OCTOBER 1992 Space-Saving Package Option: Shrink Small-Outline Package (DB)


    OCR Scan     		SN54ABT2953, SN74ABT2953 D3790, 1991-REVISED ABT2953 D3790 PDF

    2v5 low skew buffer

    Abstract: 10E1 20E2 SN74LVCH16540A
    Contextual Info: SN74LVCH16540A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SC AS569A - MARCH 1996 - REVISED JUNE 1996 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW EPIC ™ (Enhanced-Performance Implanted CMOS) Submicron Process , Typical V q l p (Output Ground Bounce)


    OCR Scan     		SN74LVCH16540A 16-BIT SCAS569A MIL-STD-883C, JESD-17 01DL5ME 2v5 low skew buffer 10E1 20E2 PDF

    RS4S5

    Contextual Info: SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS D3381, MARCH 1980 SN751177 N PA C K A G E TOP VIEW • Meets EIA Standards RS-422-A, RS485 • Meets CCITT Recommendations V.10, V.11.X.26, X.27 • Designed for Multipoint Bus Transmission on Long Bus Lines In Noisy Environments


    OCR Scan     		SN751177, SN751178 D3381, RS-422-A, RS485 SN751177 SN7S1177, SN751178 RS4S5 PDF

    CDC204-7

    Abstract: CDC204 phase inverters circuit diagram
    Contextual Info: CDC204, CDC204-7 HEX INVERTERS/CLOCK DRIVERS S C A S 098C - OCTO BER 1 9 8 9 - RE V IS E D MARCH 1994 DW OR N PACKAGE TOP VIEW * CDC204 Replaces 74AC11204 * CDC204-7 Replaces 74AC11204-7 * Low-Skew Propagation Delay Specifications for Clock-Driver Applications


    OCR Scan     		CDC204, CDC204-7 SCAS098C CDC204 74AC11204 CDC204-7 74AC11204-7 500-mA 300-mil CDC204/204-7 phase inverters circuit diagram PDF

    ic TL034

    Contextual Info: TL034, TL034A ENHANCED JFET LOW-POWER LOW -OFFSET QUAD OPERATIONAL AMPLIFIERS D3153, JULY 1988 - REVISED FEBRUARY 1991 D , J , or N P A C K A G E • Maximum Offset Voltage . . . 1.5 mV T O P V IE W • High Slew Rate . . . 2.9 V/jis Typ 1 0 U T [ 1 • Low Input Bias Current . . . 2pATyp


    OCR Scan     		TL034, TL034A D3153, 26mWTyp TL034 BOX655303-DALLAS. ic TL034 PDF

    TL052

    Abstract: op tl082 Instrumentation Amplifier circuit with tl082 TL052C
    Contextual Info: TL052, TL052A ENHANCED JFET PRECISION DUAL OPERATIONAL AMPLIFIERS D3235, JUNE 1988- REVISED FEBRUARY 1991 • Maximum Offset Voltage . . . 800 |iV TL052A • High Slew Rate . . . 17.8 V/jis Typ at 25°C • Low Total Harmonic Distortion . . . 0.003% Typ at R|_ = 2 kfl


    OCR Scan     		TL052, TL052A D3235, TL052A) LT1004, LT1009, LM385. LM385, LT1009 TL052 op tl082 Instrumentation Amplifier circuit with tl082 TL052C PDF

    intel 82385

    Abstract: 82386 20D11 21G22
    Contextual Info: SN74ACT2140A 2-WAY 4K x 18/8K x 18 CACHE DATA RAM D3291, N O VEM BER 1989-R E V IS E D JUN E 1990 FN P ACKA G E Interfaces Directly with the Intel 82385 Cache Controller TOP VIE W T - C M C O T j-in tO I II II 6 II 5 AO ] 8 7 GND ] 9 Configurable for 2-Way or Direct Mapped


    OCR Scan     		SN74ACT2140A 18/8K D3291, 1989-R 33-MHz 64K-Byte ACT2140A intel 82385 82386 20D11 21G22 PDF

    SN74LVCH16244A

    Contextual Info: SN74LVCH16244A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS S C A S 3 1 3 B - NO VEM BER 1993 - REVISED AUG UST 1995 DGG OR DL PACKAGE CTOP VIEW • Member of the Texas Instruments Wldebus Family • EPIC™ Enhanced-Performance Implanted CMOS) Submicron Process


    OCR Scan     		SN74LVCH16244A 16-BIT SCAS313B- MIL-STD-883C, JESD-17 AThl723 PDF

    BOX655303

    Abstract: SN74ACT7801
    Contextual Info: SN74ACT7801 1024 x 18 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY D3489, A P R IL 1990 In dep end ent A syn ch ro nou s Inputs and O utputs Input Ready, O utput Ready, and H alf Full Flags 1024 W ords by 18 B its Each C ascadable in W ord W idth and/or W ord Depth


    OCR Scan     		SN74ACT7801 D3489, 50-pF 2048-Word 18-Bit, d18-d35 d0-d17 1024-Word 36-Bit BOX655303 SN74ACT7801 PDF

    TLE21421

    Abstract: S-108 TLE2141 TLE2141A TLE2141ACD TLE2141ACP TLE2141AID TLE2141CD TLE2141CP TLE2141ID
    Contextual Info: firn TLE2141, TLE2141A EXCALIBUR LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIERS D36S2, NOVEMBER 1990 - REVISED FEBRUARY 1991 available features Low Noise: 10 Hz . . 1 kHz . . Low V|Q . . . 500 ilV Max at 25°C Single or Split Supply . . . 4 V to 44 V


    OCR Scan     		TLE2141, TLE2141A D36S2, 000-pF 20-mA TLE2142I, TLE2141 SLOS062A TLE21421 S-108 TLE2141ACD TLE2141ACP TLE2141AID TLE2141CD TLE2141CP TLE2141ID PDF