KLT20
Abstract: HLT20 SO-8 HLT20 TSSOP-8 socket ic so8 socket
Text: MC10ELT20, MC100ELT20 5V TTL to Differential PECL Translator The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of
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MC10ELT20,
MC100ELT20
MC10ELT/100ELT20
ELT20
HLT20
KLT20
MC100ELT20
AN1404
AN1405
HLT20 SO-8
TSSOP-8 socket
ic so8 socket
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HEL01
Abstract: transistor E101 KEL01
Text: MC10EL01, MC100EL01 5V ECL 4-Input OR/NOR The MC10EL/100EL01 is a 4-input OR/NOR gate. The device is functionally equivalent to the E101 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E101, the EL01 is ideally suited for those
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MC10EL01,
MC100EL01
MC10EL/100EL01
HEL01
KEL01
AND8020
AN1404
AN1405
AN1406
AN1503
transistor E101
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Untitled
Abstract: No abstract text available
Text: MC100EL59 5V ECL Triple 2:1 Multiplexer The MC100EL59 is a triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device useful for both data path and random
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MC100EL59
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
AN1568
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KEL04
Abstract: HL04 HEL04 ECL IC NAND
Text: MC10EL04, MC100EL04 5V ECL 2-Input AND/NAND The MC10EL/100EL04 is a 2-input AND/NAND gate. The device is functionally equivalent to the E104 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E104, the EL04 is ideally suited for those
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MC10EL04,
MC100EL04
MC10EL/100EL04
HEL04
KEL04
AND8020
AN1404
AN1405
AN1406
AN1503
HL04
ECL IC NAND
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KEL31
Abstract: hel31 HEL31 SOIC8
Text: MC10EL31, MC100EL31 5 V ECL D Flip-Flop With Set and Reset The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally
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MC10EL31,
MC100EL31
MC10EL/100EL31
MC100EL31
AN1404
AN1405
AN1406
AN1503
AN1504
KEL31
hel31
HEL31 SOIC8
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PDF
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100EL90
Abstract: Application Note AND8002/D
Text: MC100EL90 −3.3V / −5V Triple ECL Input to PECL Output Translator The MC100EL90 is a triple ECL to PECL translator. The device receives either −3.3 V or −5 V differential ECL signals, determined by the VEE supply level, and translates them to standard +5 V differential PECL
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MC100EL90
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
AN1568
100EL90
Application Note AND8002/D
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HEL05
Abstract: KEL05 hl05 ECL IC NAND
Text: MC10EL05, MC100EL05 5V ECL 2-Input Differential AND/NAND The MC10EL/100EL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the E404 device with higher performance capabilities. With propagation delays and output transition
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MC10EL05,
MC100EL05
MC10EL/100EL05
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
HEL05
KEL05
hl05
ECL IC NAND
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PDF
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KLT20
Abstract: ELT20 HT20 MC100ELT20 MC10ELT20 HLT20 BD 3445 E
Text: MC10ELT20, MC100ELT20 5VĄTTL to Differential PECL Translator The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of
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MC10ELT20,
MC100ELT20
MC10ELT/100ELT20
ELT20
HLT20
r14525
MC10ELT20/D
KLT20
HT20
MC100ELT20
MC10ELT20
HLT20
BD 3445 E
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KEL52
Abstract: hel52 TRANSISTOR bd 657 KL52
Text: MC10EL52, MC100EL52 5V ECL Differential Data and Clock D Flip-Flop The MC10EL/100EL52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the E452 device with higher performance capabilities. With propagation delays and
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MC10EL52,
MC100EL52
MC10EL/100EL52
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
KEL52
hel52
TRANSISTOR bd 657
KL52
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100el29
Abstract: No abstract text available
Text: MC100EL29 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset The MC100EL29 is a dual master−slave flip flop. The device features fully differential Data and Clock inputs as well as outputs. Data enters the master latch when the clock is LOW and transfers to
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MC100EL29
AND8020
MC100EL29
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
100el29
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KEL01
Abstract: HEL01 MC100EL01 MC10EL01
Text: MC10EL01, MC100EL01 5VĄECL 4ĆInput OR/NOR The MC10EL/100EL01 is a 4-input OR/NOR gate. The device is functionally equivalent to the E101 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E101, the EL01 is ideally suited for those
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MC10EL01,
MC100EL01
MC10EL/100EL01
AND8003/D
r14525
MC10EL01/D
KEL01
HEL01
MC100EL01
MC10EL01
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KEL04
Abstract: HL04 HEL04 e104 MC100EL04 MC10EL04 HL-04
Text: MC10EL04, MC100EL04 5VĄECL 2ĆInput AND/NAND The MC10EL/100EL04 is a 2-input AND/NAND gate. The device is functionally equivalent to the E104 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E104, the EL04 is ideally suited for those
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MC10EL04,
MC100EL04
MC10EL/100EL04
AND8003/D
r14525
MC10EL04/D
KEL04
HL04
HEL04
e104
MC100EL04
MC10EL04
HL-04
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KEL07
Abstract: HL-07 E107 MC100EL07 MC10EL07 hl07 IC HEL07
Text: MC10EL07, MC100EL07 5VĄECL 2ĆInput XOR/XNOR The MC10EL/100EL07 is a 2-input XOR/XNOR gate. The device is functionally equivalent to the E107 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E107, the EL07 is ideally suited for those
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MC10EL07,
MC100EL07
MC10EL/100EL07
AND8003/D
r14525
MC10EL07/D
KEL07
HL-07
E107
MC100EL07
MC10EL07
hl07 IC
HEL07
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MC100EL30
Abstract: MC100EL30DW MC100EL30DWR2
Text: MC100EL30 5VĄECL Triple D Flip-Flop with Set and Reset The MC100EL30 is a triple master–slave D flip flop with differential outputs. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the clock input.
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MC100EL30
MC100EL30
r14525
MC100EL30/D
MC100EL30DW
MC100EL30DWR2
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PDF
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AND8020
Abstract: MC100EL13 MC100EL13DW MC100EL13DWR2 100EL13
Text: MC100EL13 5VĄECL Dual 1:3 Fanout Buffer The MC100EL13 is a dual, fully differential 1:3 fanout buffer. The Low Output–Output Skew of the device makes it ideal for distributing two different frequency synchronous signals. The differential inputs have special circuitry which ensures device
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MC100EL13
MC100EL13
r14525
MC100EL13/D
AND8020
MC100EL13DW
MC100EL13DWR2
100EL13
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EL33
Abstract: HEL33 KEL33 MC100EL33 MC10EL33 kl-33
Text: MC10EL33, MC100EL33 5VĄECL ÷4 Divider The MC10EL/100EL33 is an integrated ÷4 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions,
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MC10EL33,
MC100EL33
MC10EL/100EL33
r14525
MC10EL33/D
EL33
HEL33
KEL33
MC100EL33
MC10EL33
kl-33
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AND8020
Abstract: EL90 MC100EL90 MC100EL90DW MC100EL90DWR2 100EL90
Text: MC100EL90 -3.3V / -5VĄTriple ECL Input to PECL Output Translator The MC100EL90 is a triple ECL to PECL translator. The device receives either –3.3 V or –5 V differential ECL signals, determined by the VEE supply level, and translates them to standard +5 V differential PECL
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MC100EL90
MC100EL90
r14525
MC100EL90/D
AND8020
EL90
MC100EL90DW
MC100EL90DWR2
100EL90
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PDF
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AND8020
Abstract: MC100EL29 MC100EL29DW MC100EL29DWR2 100el29
Text: MC100EL29 5VĄECL Dual Differential Data and Clock D Flip-Flop With Set and Reset The MC100EL29 is a dual master–slave flip flop. The device features fully differential Data and Clock inputs as well as outputs. Data enters the master latch when the clock is LOW and transfers to
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MC100EL29
MC100EL29
r14525
MC100EL29/D
AND8020
MC100EL29DW
MC100EL29DWR2
100el29
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PDF
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10QA3
Abstract: AN1406 E210 LVE111 MC100E210 MC100E210FN MC100E210FNR2
Text: MC100E210 5VĄECL Dual 1:4, 1:5 Differential Fanout Buffer The MC100E210 is a low voltage, low skew dual differential ECL fanout buffer designed with clock distribution in mind. The device features two fanout buffers, a 1:4 and a 1:5 buffer, on a single chip. The
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MC100E210
MC100E210
LVE111
r14525
MC100E210/D
10QA3
AN1406
E210
MC100E210FN
MC100E210FNR2
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PDF
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E310
Abstract: AN1406 405C MC100E310 MC100E310FN MC100E310FNR2
Text: MC100E310 5VĄECL Low Voltage 2:8 Differential Fanout Buffer The MC100E310 is a low voltage, low skew 2:8 differential ECL fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system
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MC100E310
MC100E310
r14525
MC100E310/D
E310
AN1406
405C
MC100E310FN
MC100E310FNR2
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PDF
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MC100EL59
Abstract: MC100EL59DW MC100EL59DWR2 AND8020
Text: MC100EL59 5VĄECL Triple 2:1 Multiplexer The MC100EL59 is a triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device useful for both data path and random
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Original
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MC100EL59
MC100EL59
r14525
MC100EL59/D
MC100EL59DW
MC100EL59DWR2
AND8020
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PDF
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E142 wafer format
Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Text: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001 SCILLC, 2001 Previous Edition 2000 “All Rights Reserved”
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DL140/D
Jan-2001
r14525
E142 wafer format
HEL32
MR 4710 IC
300w power amplifier circuit diagram
HEL05
klt22
HEL12 HEL31
HEL16
HLT22
HLT28
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PDF
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marking 2AE1
Abstract: APC UPS CIRCUIT DIAGRAM MPC8270 ATML MPC8280RM LG crt monitor service manual lp 1610 for door bell APC UPS CIRCUIT BOARD MC68360 MPC8275
Text: MPC8280 PowerQUICC II Family Reference Manual Supports MPC8270 MPC8275 MPC8280 MPC8280RM Rev. 1, 12/2005 How to Reach Us: Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370
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MPC8280
MPC8270
MPC8275
MPC8280
MPC8280RM
CH370
15Fers
marking 2AE1
APC UPS CIRCUIT DIAGRAM
MPC8270
ATML
MPC8280RM
LG crt monitor service manual
lp 1610 for door bell
APC UPS CIRCUIT BOARD
MC68360
MPC8275
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PDF
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AC125K
Abstract: 6AN7 tungsram 3S035T-1 ecc83 application notes ECL86 DG 7-123 tungsram AC125UZ PENTODE pl 508 ot-400 tungsram
Text: TUNGSRAM 1 ELECTRON TUBES AND SEMI CONDUCTORS 1979 RADIO & TV RECEIVING TUBES OSCILLOSCOPE & MONITOR TUBES TRANSMITTING TUBES, RECTIFIERS & MICROWAVE TUBES SEMICONDUCTORS RECEIVING TUBES CONSUMER TYPES INDUSTRIAL TYPES VOLTAGE REGULATORS TY P E ASSO R TM EN T
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OCR Scan
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76665N
76889N
MA748PC
MA709PC
jA710PC
A711PC
iA712PC
A723PC
HA741PC
A747PC
AC125K
6AN7
tungsram 3S035T-1
ecc83 application notes
ECL86
DG 7-123
tungsram
AC125UZ
PENTODE pl 508
ot-400 tungsram
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PDF
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