BA48B Search Results

CY62143BVLL-70BAI

Contextual Info: 47V CY62143BV MoBL PRELIMINARY 256K x 16 Static RAM Features • Low voltage range: — CY62143BV: 2.7V–3.6V • Ultra-low active, standby power • Automatic power-down when deselected • TTL Compatible inputs and outputs • CMOS for optimum speed/power

Contextual Info: CY14U256LA 256-Kbit 32 K x 8 nvSRAM 256-Kbit (32 K × 8) nvSRAM Features Functional Description • 35 ns access time ■ Internally organized as 32 K × 8 ■ Hands off automatic STORE on power down with only a small capacitor ■ STORE to QuantumTrap nonvolatile elements initiated by

ultra fine pitch BGA

Abstract: CY62147CV25 CY62147CV30 CY62147CV33 CY62147V
Contextual Info: 47V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are

Contextual Info: CY62147CV25/30/33 ADVANCE INFORMATION MoBL 256K x 16 Static RAM are placed in a high-impedance state when: deselected CE HIGH , outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).

CY7C1041DV33-10ZSXI

Abstract: CY7C1041DV33 CY7C1041DV33-10VXI
Contextual Info: CY7C1041DV33 PRELIMINARY 4-Mbit 256K x 16 Static RAM Features Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte LOW Enable (BLE) is LOW, then data from I/O pins (I/O0–I/O7), is written into the location specified on the address pins (A0–A17). If Byte

Contextual Info: CY14V104LA CY14V104NA 4-Mbit 512 K x 8 / 256 K × 16 nvSRAM 4-Mbit (512 K × 8 / 256 K × 16) nvSRAM Features Functional Description • 25 ns and 45 ns access times ■ Internally organized as 512 K × 8 (CY14V104LA) or 256 K × 16 (CY14V104NA) ■ Hands off automatic STORE on power-down with only a small

1041C 8 pin

Abstract: CY7C1041CV33-10BAI 1041C CY7C1041BV33 CY7C1041CV33
Contextual Info: CY7C1041CV33 256K x 16 Static RAM Features Byte HIGH Enable BHE is LOW, then data from I/O pins (I/O8 – I/O15) is written into the location specified on the address pins (A0 – A17). • Pin equivalent to CY7C1041BV33 • High speed — tAA = 10 ns • Low active power

CY62146VLL-70ZI

Abstract: CY62146V
Contextual Info: 1*CY62146V MoBL CY62146V MoBL™ 256K x 16 Static RAM Features • Low voltage range: — CY62146V: 2.7V–3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected

Contextual Info: CY14V101LA CY14V101NA 1-Mbit 128 K x 8/64 K × 16 nvSRAM 1-Mbit (128 K × 8/64 K × 16) nvSRAM Functional Description Features • 25 ns and 45 ns access times ■ Internally organized as 128 K × 8 (CY14V101LA) or 64 K × 16 (CY14V101NA) ■ Hands off automatic STORE on power down with only a small

K6X0808C1D-BF55

Abstract: HY6264P AS6C1008-55SIN samsung p28 K6R4016V1D-UC10 as6c4008-55sin HYNIX IS61LV25616AL-10KLI GS71116AGP-10 uPD431000ACZ-70L
Contextual Info: cross_reference Density Organization Alliance Alliance Part Number Alliance Package Alliance Speed Samsung Samsung Part Number Cypress Cypress Part Number Cypress Package Cypress Package Code Cypress Speed IDT Part Number IDT Package IDT Package Code IDT Speed ISSI

CY62146CV18

Contextual Info: CY62146CV18 MoBL2 256K x 16 Static RAM Features • High Speed — 55 ns and 70 ns availability • Low voltage range: — 1.65V–1.95V • Pin Compatible with CY62146BV18 • Ultra-low active power — Typical Active Current: 0.5 mA @ f = 1 MHz • •

CY62146CV18

Contextual Info: CY62146CV18 MoBL2 256K x 16 Static RAM Features • High Speed — 55 ns and 70 ns availability • Low voltage range: — 1.65V–1.95V • Pin Compatible with CY62146BV18 • Ultra-low active power — Typical Active Current: 0.5 mA @ f = 1 MHz • •

CY62147V

Abstract: CY62147VLL-70ZI
Contextual Info: 47V CY62147V MoBL 256K x 16 Static RAM Features • Low voltage range: — CY62147V: 2.7V–3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected

CY62146CV30

Abstract: CY62146V
Contextual Info: CY62146CV30 MoBL 256K x 16 Static RAM Features reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by 99% when deselected CE HIGH . The input/output pins (I/O0 – I/O15) are placed in a

Contextual Info: 147V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are

CY62147CV18

Contextual Info: CY62147CV18 MoBL2 256K x 16 Static RAM Features power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance

CY62146CV18

Contextual Info: CY62146CV18 MoBL2 256K x 16 Static RAM Features an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected CE HIGH . The input/output pins (I/O0 through I/O15) are

BA36B

Abstract: fBGA 80 package
Contextual Info: Package Diagrams Ball Grid Array Packages 36-Ball Thin BGA BA36A 51-85099-B 1 Package Diagrams 36-Ball 7.00 mm x 8.5 mm x 1.2 mm Thin BGA BA36B 51-85105-*C 2 Package Diagrams 42-Ball FBGA (7.0 x 5.0 x 1.2 mm) BA42 51-85139-*C 3 Package Diagrams 48-Ball (8.0 x 14.0 x 1.1 mm) Thin BGA BA47

CY62146VLL-70BAI

Abstract: CY62146V CY62146VLL-70ZI
Contextual Info: 46V CY62146V MoBL 256K x 16 Static RAM Features • Low voltage range: — CY62146V: 2.7V–3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected

Contextual Info: 47V CY62147CV18 MoBL2TM 256K x 16 Static RAM Features deselected CE HIGH or when CE is LOW and both BLE and BHE are HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are

Contextual Info: CY14V104LA CY14V104NA 4-Mbit 512 K x 8 / 256 K × 16 nvSRAM 4-Mbit (512 K × 8 / 256 K × 16) nvSRAM Features Functional Description • 25 ns and 45 ns access times ■ Internally organized as 512 K × 8 (CY14V104LA) or 256 K × 16 (CY14V104NA) ■ Hands off automatic STORE on power-down with only a small

CY62146CV30

Abstract: CY62146V
Contextual Info: CY62146CV30 MoBL 256K x 16 Static RAM Features power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by 99% when deselected CE HIGH . The input/output pins (I/O0–I/O15) are placed in a high-impedance

CY7C1041BV33

Abstract: CY7C1041CV33 CY7C1041CV33-10BAC
Contextual Info: CY7C1041CV33 256K x 16 Static RAM Features HIGH Enable BHE is LOW, then data from I/O pins (I/O8–I/O15) is written into the location specified on the address pins (A0–A17). • Pin equivalent to CY7C1041BV33 • High speed — tAA = 10 ns • Low active power

CY62146CV30

Abstract: CY62146V
Contextual Info: CY62146CV30 MoBL 256K x 16 Static RAM Features power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by 99% when deselected CE HIGH . The input/output pins (I/O0–I/O15) are placed in a high-impedance