BS0112B Search Results

gal16v8a national semiconductor

Abstract: GAL16V8A GAL Gate Array Logic
Contextual Info: ATL SEMICÖND MEMORY 31E » bS0112b 00^4532 T PRELIMINARY GAL16V8A Generic Array Logic General Description Tha NSC E2CMOStm GAL device combines a high per­ formance CMOS process with electrically erasable floating gate technology. This programmable memory technology

nmc9346n

Abstract: NMC9346
Contextual Info: NATL SEMÎCOND MEMORY 3 IE D bS0112b Q O L 34SI 4 NMC9346 National Semiconductor NMC9346 1024-Bit Serial Electrically Erasable Programmable Memory General Description Features The NMC9346 Is a 1024-bit non-volatile, sequential E2PROM, fabricated using advanced N-channel E2PROM

Contextual Info: NATIONAL SEMICOND -CLOGIO 1GE D | bS0112B OObSbDS S | CTl National mZA Semiconductor PRELIMINARY s ui 4k X o •u -si MM54HCT147/MM74HCT147 10-to-4 Line Priority Encoder 3 '■j General Description This priority encoder utilizes advanced sllicon-gate CMOS

MMC9346

Abstract: NMC9346EN NMC9346N COP400 M08A NMC9346 NMC9346EM8 NMC9346M8 MMC9346E
Contextual Info: NATL SEMÎCOND MEMORY 3I E D bS0112b QOL3 4 S I 4 NMC9346 National Semiconductor NMC9346 1024-Bit Serial Electrically Erasable Programmable Memory General Description Features The NMC9346 Is a 1024-bit non-volatile, sequential E2PROM, fabricated using advanced N-channel E2PROM

54ACT

Abstract: 74S818
Contextual Info: N A T IO NAL SEMICON] LO GIC) b lE P • bS0112B DDVSaBH M N S O National Semiconductor 54ACT/74ACT818 8-Bit Diagnostic Register General Description Features The 'ACT818 is a high-speed, general-purpose pipeline reg­ ister with an on-board diagnostic register for performing se­

NM95MS15

Abstract: NM95MS15S SA10 SA11 SA12
Contextual Info: Semiconductor PRELIMINARY February 1996 NM95MS15 Plug and Play Front-End Device for ISA-Bus Systems General Description Features The NM95MS15 is one of the family of single chip solutions designed to provide complete Plug and Play capability for ISA bus systems. The NM95MS15 includes the necessary

NM29A040

Abstract: NM29A040M NM29A040V V28A 000E8H
Contextual Info: August 1995 S e m i c o n d u c t o r N M 29A 040 4-M bit CM OS Serial FLASH E2PROM General Description Features The NM29A040 is a 4-Mbit Flash memory designed with a MICROWIRE serial interface. Ail of the features of the device are designed to provide the most cost effective solu­

DS3667

Abstract: DS3667N
Contextual Info: DS3667 S3 National ÆlÆ Semiconductor DS3667 TRI-STATE Bidirectional Transceiver General Description Features The DS3667 is a high-speed Schottky 8-channel bidirection­ al transceiver designed or digital information and communi­ cation systems. Pin selectable totem-pole/open collector

DS3875

Abstract: DS3883 DS3885 DS3885V DS3885VF V44A VF44B
Contextual Info: DS3885 National f t ! Semiconductor DS3885 BTL Arbitration Transceiver General Description Features The DS38B5 is one in a series of transceivers designed spe­ cifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3885 Arbitra­

DS36C27

Abstract: DS36C280 DS36C280M DS36C280N DS36C280T DS36C280TM DS36C280TN M08A 120521-1
Contextual Info: DS36C280 National Semiconductor DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver General Description Features The DS36C280 is a low power differential bus/line trans­ ceiver designed to meet the requirements of RS-485 Stan­ dard for multipoint data transmission. In addition, it is com­

rgb 18 bit to lvds

Abstract: DS90CR561 DS90CR561MTD DS90CR562 DS90CR562MTD MTD48
Contextual Info: a t i o n a l S e m i c o n d u c t o r DS90CR561/DS90CR562 LVDS 18-Bit Color Flat Panel Display FPD Link General Description The DS90CR561 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted

73sb

Abstract: 1N916 26LS30 26LS32 DS8925 DS8925M M16A 11b95-12 d0ji G0735
Contextual Info: DS8925 N a t i o n a l t S e m i c o n d u c t o r ß DS8925 LocalTalk Dual Driver/Triple Receiver General Description Features The DS8925 is a dual driver/triple receiver device optimized to provide a single chip solution for a LocalTalk Interface. The device provides one differential TIA/EIA-422 driver,

D4206-1

Abstract: 37 TV ocean lcd Schematic circuit diagram CMT 8000 cd crystal AM29F040 NSAM265SF NSAM265SR TP3054 GTM Corporation gl echo cancellation schematic diagram 3SB14
Contextual Info: PRELIMINARY Semiconductor September 1995 N S A M 265S R /N S A M 265S F CompactSPEECH Digital Speech Processors General Description Features The NSAM265SR and the NSAM265SF are members of National Semiconductor's CompactSPEECH, Digital Speech processors family. These processors provide Digital

0751B

Abstract: DS90CF583 DS90CF583MTD DS90CF584 DS90CF584MTD MTD56 lvds js
Contextual Info: DS90CF583/DS90CF584 N a t i o n a l S e m i c o n d u c t o r DS90CF583/DS90CF584 LVDS 24-Bit Color Flat Panel Display FPD Link—65 MHz General Description Features The DS90CF583 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signalling)

27LC256

Abstract: 27LC64 NM27LC512
Contextual Info: NM27LC512 E H N a tio n a l mm Semiconductor NM27LC512 524,288-Bit 64k x 8 Low Current CMOS EPROM General Description Features The NM27LC512 is a 64k x 8 EPROM manufactured on a proven, manufacturable CMOS process, consuming ex­ tremely low current In both the active and standby modes.

NS2N

Contextual Info: NATIONAL SEMICOND -CLOGIO IDE D | b S O U S S 00t,bM3fl b | <91 DM54ALS14/DM74ALS14 Hex Inverters with Schmitt Trigger Inputs General Description Features This device contains six independent gates, each of which performs the logic INVERT function. Each input has hyster­

DS8820N

Contextual Info: NATL S E M I C O N D M E M O R Y bSDHSb bflE D G ü b T H Ü ß 7MO « N S C 3 DS7820/DS8820 50 National mm Semiconductor DS7820/DS8820 Dual Line Receiver General Description Features The DS7820, specified from -55°C to + 1 25“C, and the DS8820, specified from 0°C to + 70°C, are digital line re­

39V18

Abstract: GAL39V18 Signal Path Designer
Contextual Info: NATL SEMICOND MEMORY 31E J> bSOHEb 00fcj4244 k U National Semiconductor GAL39V18 Generic Array Logic General Description Features Using a high performance E2CMOS technology, National Semiconductor has produced a next-generation program­ mable logic device, the GAL 39V18. Having an FPLA archi­

KF 423

Contextual Info: NATL SEMICOND MEMORY bflE D bSail2b □Dt.'iaSM TT7 NSC3 DS1691A/DS3691 £3 Semiconductor National DS1691A/DS3691 (RS-422/RS-423) Line Drivers with TRI-STATE Outputs General Description Features The DS1691A/DS3691 are low power Schottky TTL line drivers designed to meet the requirements of EIA standards

27CP128

Abstract: 27CP128Q250 27C256 General Semiconductor 27cp128q 27CP128Q250/883
Contextual Info: NATL S E M I C O N D 31E D MEMORY March 1989 "7= Ì & - / Ì - 2 9 27CP128 131,072-Bit (16,384 x 8) UV Erasable CMOS PROM Military Qualified General Description Features The 27CP128 is a high-speed 128K UV erasable and electri­ cally reprogrammable CMOS EPROM, ideally suited for ap­

Eprom B 2716 D

Abstract: NMC27C512AQ250 EPROM NMC27C512A NMC27C256
Contextual Info: NATL SEMICOND MEMORY 31E D bSQUHb QQt i340É PRELIM INARY National Semiconductor '7 '- V ^ - / 3 - 3 7 Features • Clocked sense amps for fast access time down to The NMC27C512A Is a high-speed 512k UV erasable and 150 ns electrically reprogrammable CMOS EPROM, Ideally suited

Contextual Info: DS9637A & National Semiconductor DS9637A Dual Differential Line Receiver General Description Features The DS9637A is a Schottky dual differential line receiver which has been specifically designed to satisfy the require­ ments of EIA Standards RS-422 and RS-423. In addition,

Contextual Info: DS9622 National Semiconductor DS9622 Dual Line Receiver General Description Features The DS9622 is a dual line receiver designed to discriminate a worst case logic swing of 2V from a ± 10V common mode noise signal or ground shift, A 1.5V threshold is built into the

MM54240N

Contextual Info: April 1£ MM54240 Asynchronous Receiver/Transmitter Remote Controller General Description The MM54240 is a monolithic MOS integrated circuit utiliz­ ing N-channel low-threshold, enhancement mode and ionimplanted depletion mode devices. The circuit is designed