U74LVC1G00
Abstract: 10MHZ U74LVC1G00G-AF5-R U74LVC1G00G-AL5-R
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC1G00 CMOS IC SINGLE 2-INPUT NAND GATE DESCRIPTION The U74LVC1G00 is a 2-input NAND gate device which provides the Function Y=A • B or Y=A + B in positive logic. This device has power-down protective circuit preventing device
|
Original
|
PDF
|
U74LVC1G00
U74LVC1G00
U74LVC1G00G-AF5-R
U74LVC1G00G-AL5-R
OT-25
OT-353
QW-R502-401
U74LVC1Gt
10MHZ
U74LVC1G00G-AF5-R
U74LVC1G00G-AL5-R
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC1G00 CMOS IC SINGLE 2-INPUT NAND GATE DESCRIPTION The U74LVC1G00 is a 2-input NAND gate device which provides the Function Y=A • B or Y=A + B in positive logic. This device has power-down protective circuit preventing device
|
Original
|
PDF
|
U74LVC1G00
U74LVC1G00
U74LVC1G00L-AF5-R
U74LVC1G00G-AF5-R
U74LVC1G00L-AL5-R
U74LVC1G00G-AL5-R
OT-25
OT-353
QW-R502-401
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC1G00 CMOS IC SINGLE 2-INPUT NAND GATE DESCRIPTION The U74LVC1G00 is a 2-input NAND gate device which provides the Function Y=A • B or Y=A B in positive logic. This device has power-down protective circuit preventing device
|
Original
|
PDF
|
U74LVC1G00
U74LVC1G00
U74LVC1G00L-AE5-R
U74LVC1G00G-AE5-R
U74LVC1G00L-AF5-R
U74LVC1G00G-AF5-R
U74LVC1G00L-AL5-R
U74LVC1G00G-AL5-R
OT-23-5
OT-25
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74AUC1G00 CMOS IC SINGLE 2-INPUT NAND GATE DESCRIPTION The U74AUC1G00 is a 2-input NAND gate which provides the function Y=A • B or Y=A B in positive logic. This device has power-down protective circuit, preventing device
|
Original
|
PDF
|
U74AUC1G00
U74AUC1G00
U74AUC1G00G-AE5-R
U74AUC1G00G-AL5-R
OT-23-5
OT-353
QW-R126-013
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74AUC1G32 CMOS IC SINGLE 2-INPUT POSITIVE-OR GATE DESCRIPTION The U74AUC1G32 is a single 2-input OR gate which provides the function Y=A+B or Y=A B in positive logic. This device has power-down protective circuit, preventing device
|
Original
|
PDF
|
U74AUC1G32
U74AUC1G32
U74AUC1G32G-AE5-R
U74AUC1G32G-AL5-R
OT-23-5
OT-353
QW-R126-016
|
Untitled
Abstract: No abstract text available
Text: SN74LVC1G332 www.ti.com SCES489E – SEPTEMBER 2003 – REVISED DECEMBER 2013 Single 3-Input Positive-OR Gate Check for Samples: SN74LVC1G332 FEATURES DESCRIPTION • The SN74LVC1G332 device performs the Boolean Y + A B ) C or Y + A • B • C function
|
Original
|
PDF
|
SN74LVC1G332
SCES489E
SN74LVC1G332
24-mA
|
Untitled
Abstract: No abstract text available
Text: SN74LVC1G332 www.ti.com SCES489E – SEPTEMBER 2003 – REVISED DECEMBER 2013 Single 3-Input Positive-OR Gate Check for Samples: SN74LVC1G332 FEATURES DESCRIPTION • The SN74LVC1G332 device performs the Boolean Y + A B ) C or Y + A • B • C function
|
Original
|
PDF
|
SN74LVC1G332
SCES489E
SN74LVC1G332
24-mA
|
Untitled
Abstract: No abstract text available
Text: SN74LVC1G332 www.ti.com SCES489E – SEPTEMBER 2003 – REVISED DECEMBER 2013 Single 3-Input Positive-OR Gate Check for Samples: SN74LVC1G332 FEATURES DESCRIPTION • The SN74LVC1G332 device performs the Boolean Y + A B ) C or Y + A • B • C function
|
Original
|
PDF
|
SN74LVC1G332
SCES489E
SN74LVC1G332
24-mA
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC2G86 CMOS IC DUAL 2-INPUT EXCLUSIVE-OR GATE DESCRIPTION The U74LVC2G86 is a dual 2-input exclusive-OR gate which provides the function Y=A B or Y=AB+AB . This device has power-down protective circuit, preventing device
|
Original
|
PDF
|
U74LVC2G86
U74LVC2G86
U74LVC2G86G-S08-R
QW-R502-791
|
Untitled
Abstract: No abstract text available
Text: SN74LVC1G27 www.ti.com SCES488E – SEPTEMBER 2003 – REVISED DECEMBER 2013 Single 3-Input Positive-NOR Gate Check for Samples: SN74LVC1G27 FEATURES DESCRIPTION • The SN74LVC1G27 device performs the Boolean function Y = A + B + C or Y = A • B • C in positive
|
Original
|
PDF
|
SN74LVC1G27
SCES488E
SN74LVC1G27
24-mA
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74AUC1G02 CMOS IC SINGLE 2-INPUT NOR GATE DESCRIPTION The U74AUC1G02 is a 2-input NOR gate which provides the function Y=A+B or Y= Α • Β in positive logic. This device has power-down protective circuit, preventing device
|
Original
|
PDF
|
U74AUC1G02
U74AUC1G02
U74AUC1G02G-AE5-R
U74AUC1G02G-AL5-R
OT-23-5
OT-353
QW-R126-014
|
Untitled
Abstract: No abstract text available
Text: SN74LVC1G27 www.ti.com SCES488E – SEPTEMBER 2003 – REVISED DECEMBER 2013 Single 3-Input Positive-NOR Gate Check for Samples: SN74LVC1G27 FEATURES DESCRIPTION • The SN74LVC1G27 device performs the Boolean function Y = A + B + C or Y = A • B • C in positive
|
Original
|
PDF
|
SN74LVC1G27
SCES488E
SN74LVC1G27
24-mA
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74AHC86 CMOS IC QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES DESCRIPTION The U74AHC86 device is quadruple 2-input EXCLUSIVE-OR gate which perform the function Y=A B or Y = A B+ A B . FEATURES * Operate from 2V to 5.5V * Max tpd of 8.8ns at 5.0V
|
Original
|
PDF
|
U74AHC86
U74AHC86G-S14-R
U74AHC86G-P14-R
OP-14
TSSOP-14
QW-R502-640
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC1G10 CMOS IC SINGLE 3-INPUT POSITIVE-NAND GATE DESCRIPTION The U74LVC1G10 performs the Boolean function Y A • B C or Y = A + B + C in positive logic. The device is fully specified for partial-power-down applications
|
Original
|
PDF
|
U74LVC1G10
U74LVC1G10
U74LVC1G10L-AL6-R
QW-R502-957,
|
|
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC1G10 CMOS IC SINGLE 3-INPUT POSITIVE-NAND GATE DESCRIPTION The U74LVC1G10 performs the Boolean function Y A • B C or Y = A + B + C in positive logic. The device is fully specified for partial-power-down applications
|
Original
|
PDF
|
U74LVC1G10
U74LVC1G10
U74LVC1G10L-AG6-R
U74LVC1G10L-AL6-R
QW-R502-957
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC1G11 CMOS IC SINGLE 3-INPUT POSITIVE-AND GATE DESCRIPTION The U74LVC1G11 performs the Boolean function Y A • B C or Y = A + B + C in positive logic. The device is fully specified for partial-power-down applications
|
Original
|
PDF
|
U74LVC1G11
U74LVC1G11
U74LVC1G11G-AG6-R
U74LVC1G11G-AL6-R
U74LVC1G11G-AG6at
QW-R502-958
|
STM32F103xxx
Abstract: STM32F10xxB stm32f102r8 STM32F102RB STM32F10xxx STM32F10* I2C stm32f103xxx manual ic ir 2112 STM32F10* I2C errata STM32F102x
Text: STM32F10xx8 and STM32F10xxB Errata sheet STM32F101x8/B, STM32F102x8/B and STM32F103x8/B medium-density device limitations Silicon identification This errata sheet applies to the revisions B, Z and Y of the STMicroelectronics mediumdensity STM32F101xx access line and STM32F103xx performance line products, and to
|
Original
|
PDF
|
STM32F10xx8
STM32F10xxB
STM32F101x8/B,
STM32F102x8/B
STM32F103x8/B
STM32F101xx
STM32F103xx
STM32F102xx
32-bit
STM32F103xxx
STM32F10xxB
stm32f102r8
STM32F102RB
STM32F10xxx
STM32F10* I2C
stm32f103xxx manual
ic ir 2112
STM32F10* I2C errata
STM32F102x
|
STM32F10xxB
Abstract: Part Marking STMicroelectronics flash memory STM32F10* USB STM32F10* I2C errata USART3 STM32F103xxx ARM Cortex core Date Code Marking STMicroelectronics SMBus Specification V2.0 STMicroelectronics marking code date
Text: STM32F10xx8 and STM32F10xxB Errata sheet STM32F101x8/B, STM32F102x8/B and STM32F103x8/B medium-density device limitations Silicon identification This errata sheet applies to the revisions B, Z and Y of the STMicroelectronics mediumdensity STM32F101xx access line and STM32F103xx performance line products, and to
|
Original
|
PDF
|
STM32F10xx8
STM32F10xxB
STM32F101x8/B,
STM32F102x8/B
STM32F103x8/B
STM32F101xx
STM32F103xx
STM32F102xx
32-bit
STM32F10xxB
Part Marking STMicroelectronics flash memory
STM32F10* USB
STM32F10* I2C errata
USART3
STM32F103xxx
ARM Cortex core
Date Code Marking STMicroelectronics
SMBus Specification V2.0
STMicroelectronics marking code date
|
STM32F10xxB
Abstract: STM32F10* I2C errata STM32F103rb STM32F102R8 STM32F102RB STM32F103xxx USART3 STM32F10xxx reference manual registers STM32F102xx STM32F10xxx reference manual
Text: STM32F10xx8 and STM32F10xxB Errata sheet STM32F101x8/B, STM32F102x8/B and STM32F103x8/B medium-density device limitations Silicon identification This errata sheet applies to the revisions B, Z and Y of the STMicroelectronics mediumdensity STM32F101xx access line and STM32F103xx performance line products, and to
|
Original
|
PDF
|
STM32F10xx8
STM32F10xxB
STM32F101x8/B,
STM32F102x8/B
STM32F103x8/B
STM32F101xx
STM32F103xx
STM32F102xx
32-bit
STM32F10xxB
STM32F10* I2C errata
STM32F103rb
STM32F102R8
STM32F102RB
STM32F103xxx
USART3
STM32F10xxx reference manual registers
STM32F10xxx reference manual
|
STM32F102xx
Abstract: STM32F103xxx stm32f103xxx manual Date Code Marking STMicroelectronics STM32F103rb STM32F10xxB STM32F10xxx reference manual Alternate function STM32F10xx8 st top marking lqfp48 VFQFPN36
Text: STM32F10xx8 and STM32F10xxB Errata sheet STM32F101x8/B, STM32F102x8/B and STM32F103x8/B medium-density device limitations Silicon identification This errata sheet applies to the revisions B, Z and Y of the STMicroelectronics mediumdensity STM32F101xx access line and STM32F103xx performance line products, and to
|
Original
|
PDF
|
STM32F10xx8
STM32F10xxB
STM32F101x8/B,
STM32F102x8/B
STM32F103x8/B
STM32F101xx
STM32F103xx
STM32F102xx
32-bit
STM32F103xxx
stm32f103xxx manual
Date Code Marking STMicroelectronics
STM32F103rb
STM32F10xxB
STM32F10xxx reference manual Alternate function
st top marking lqfp48
VFQFPN36
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74AC32 CMOS IC QUADRUPLE 2-INPUT POSITIVE-OR GATE DESCRIPTION The U74AC32 is a quad 2-input positive-OR gate. The device performs the Boolean function Y=A+B or Y A • B in positive logic. FEATURES * Operation Voltage Range: 2~6V
|
Original
|
PDF
|
U74AC32
U74AC32
U74AC32G-S14-R
U74AC32G-P14-R
OP-14
TSSOP-14
U74AC32G
QW-R502-988
|
Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC00A CMOS IC QUAD 2-INPUT NAND GATE DESCRIPTION The U74LVC00A is a quad 2-input NAND gate which performs the Function Y=A • B or Y=A B in positive logic circuit. This device has power-down protective circuit to prevent the
|
Original
|
PDF
|
U74LVC00A
U74LVC00A
U74LVC00AG-S14-R
U74LVC00AG-P14-R
OP-14
TSSOP-14
QW-R502-at
QW-R502-421
|
K596
Abstract: KTK596 b3 marking on a diode diode marking b2 Marking B2 marking 2004 B Y device marking
Text: SEMICONDUCTOR KTK596 MARKING SPECIFICATION TO-92M PACKAGE 1. Marking method Laser Marking or Ink Marking. 2. Marking K596 1 B 2 No. 2007. 1. 9 401 3 Item Marking Description Device Name K596 KTK596 IDSS Rank B B B1, B2, B3 , C, Y, GR Lot No. 401 2004. 1st Week
|
Original
|
PDF
|
KTK596
O-92M
K596
KTK596
b3 marking on a diode
diode marking b2
Marking B2
marking 2004
B Y device marking
|
U74LVC1G02
Abstract: 10MHZ U74LVC1G02G-AF5-R U74LVC1G02G-AL5-R
Text: UNISONIC TECHNOLOGIES CO., LTD U74LVC1G02 CMOS IC SINGLE 2-INPUT NOR GATE DESCRIPTION The U74LVC1G02 is a 2-input NOR gate device which provides the Function Y=A+B in positive logic. This device has power-down protective circuit preventing device from destruction when it is powered down.
|
Original
|
PDF
|
U74LVC1G02
U74LVC1G02
U74LVC1G02G-AF5-R
U74LVC1G02G-AL5-R
OT-25
OT-353
QW-R502-400
10MHZ
U74LVC1G02G-AF5-R
U74LVC1G02G-AL5-R
|
