ATM management SYSTEM
Abstract: harris Jeffries
Text: SOFT-ATM ILMI SUBSYSTEM GENERAL OVERVIEW Soft-ATM® Interim Local Management Interface ILMI Subsystem from Harris provides the features of the ATM Forum’s recommendation for the ILMI netw management API. ILMI is used for various ATM management applications and
|
Original
|
|
PDF
|
HDMP 1034 AG
Abstract: HDMP-1032 AMCC DATE CODE MARKING AMCC 460, DATE CODE 4X511 sg ag20 AF2-2 hdmp 1032 1034 marking M29 TRANSISTOR AH-16
Text: Released Datasheet PMC-Sierra, Inc. Long Form Data Sheet PMC-980618 Issue 3 PM73487 QRT 622 Mbps ATM Traffic Management Device PM73487 QRT 622 Mbps ATM Traffic Management Device DATASHEET Released Issue 3: JUN 1999 Released Datasheet PMC-Sierra, Inc. PMC-980618
|
Original
|
PMC-980618
PM73487
PM73487
PMC-981001
HDMP 1034 AG
HDMP-1032
AMCC DATE CODE MARKING
AMCC 460, DATE CODE
4X511
sg ag20
AF2-2
hdmp 1032 1034
marking M29
TRANSISTOR AH-16
|
PDF
|
MOTOROLA SCR
Abstract: atm recommendation availability
Text: P R O D U C T B R I E F ATM Buffer Manager V2.1 The ABM PXB 4330 Traffic Management Device is well accepted in a variety of applications where extensive ATM Traffic Management capabilities are required in either distributed or centralized system architectures of Enterprise and CO
|
Original
|
B119-H7649-G1-X-7600
MOTOROLA SCR
atm recommendation availability
|
PDF
|
verilog code for 32 bit risc processor
Abstract: MXT4400 CRC-10 CRC-32 MXT4400-A TSPS verilog code for crossbar switch
Text: M X T 4 4 0 0 Traffic Stream Processor Wire-Speed Services • ATM SAR • ATM policing and shaping • POS traffic management Traffic Management • VP, VC, flow and hierarchical traffic shaping • 64K streams VCs/flows • Dynamic bandwidth allocation
|
Original
|
MXT4400
MXT4400:
verilog code for 32 bit risc processor
CRC-10
CRC-32
MXT4400-A
TSPS
verilog code for crossbar switch
|
PDF
|
CN8236EBGB
Abstract: FIFO buffer "variable threshold" VCCS protocol VCCS Communication Protocol CN8223 CN8236
Text: OC-3 ATM SAR Controller with UTOPIA Level 2 CN8236 ATM OC-3 Service SAR Plus with xBR Traffic Management Mindspeed’s CN8236 Service Segmentation and Reassembly ServiceSAR controller integrates ATM terminal functions, PCI bus master and slave controllers,
|
Original
|
CN8236
CN8236
CN8236EBGB
FIFO buffer "variable threshold"
VCCS protocol
VCCS Communication Protocol
CN8223
|
PDF
|
Jeffries
Abstract: No abstract text available
Text: SOFTWARE HARRIS & JEFFRIES Soft-ATM* Source Code • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ATM Signalling Includes UNI 3.0, UNI 3.1, UNI 4.0, IISP, and PNNI ATM ILMI Network Management and Address Registration ATM LAN Emulation Client LEC and LAN Emulation Server (LES)
|
Original
|
|
PDF
|
ERICSSON axd 301
Abstract: AXD301
Text: Multiservice Management Suite Multiservice Management Suite Performance Monitor 3.0 Ericsson’s Multiservice Management Suite MMS is a comprehensive portfolio of flexible, carrier-class management applications that address the core requirements for managing IP- and ATM-based
|
Original
|
|
PDF
|
Untitled
Abstract: No abstract text available
Text: User Guide October 2002 TAAD08JU2 Device Manager 1 Introduction 2.1 TAAD08JU2 Architecture 1.1 Purpose TAAD08JU2 provides complete ATM low-speed access functions including framing, transmission convergence, inverse multiplexing for ATM, ATM port management, and AAL SARing functions in a single, highly
|
Original
|
TAAD08JU2
TAAD08JU2
MN02-051ATM
|
PDF
|
Internal diagram of ic 7495
Abstract: LUC4AB01 LUC4AC01 LUC4AS01 LUC4AU01 tag 8833
Text: Preliminary Product Brief March 1997 LUC4AU01 ATM Layer UNI Manager ALM Introduction — Egress CLP0s, and egress CLP1s. Features • ■ Performs ATM layer User- or Network-Network Interface (UNI or NNI) management functions, supporting up to 662 Mbits/s of ATM traffic (full duplex).
|
Original
|
LUC4AU01
PN96-064ATM
Internal diagram of ic 7495
LUC4AB01
LUC4AC01
LUC4AS01
LUC4AU01
tag 8833
|
PDF
|
ATM circuit diagram
Abstract: TC35821F
Text: TC358541F 155Mbps ATM SAR General Description Features The TC358541F chip has been designed for use in an Asynchronous Transfer Mode ATM User Network Interface (UNI). Packet stream to/from ATM link trough packet buffer, traffic shaping and buffer management per VP and VC basis, and full support
|
Original
|
TC358541F
155Mbps
TC358541F
M68000-style
ATM circuit diagram
TC35821F
|
PDF
|
VCCS protocol
Abstract: CN8237EBGB VCCS Communication Protocol CN8236 CX29704 RS8234 GR-1248 atm source code
Text: OC-12 ATM SAR with UTOPIA Level 2 CN8237 ATM OC-12 ServiceSAR Plus with xBR Traffic Management Mindspeed’s CN8237 Service Segmentation and Reassembly ServiceSAR controller integrates ATM terminal functions, PCI bus master and slave > K E Y F E AT U R E S
|
Original
|
OC-12
CN8237
CN8237
GR-1248
VCCS protocol
CN8237EBGB
VCCS Communication Protocol
CN8236
CX29704
RS8234
GR-1248
atm source code
|
PDF
|
BT8233EHFB
Abstract: 5969b l8233
Text: R O C K W E L L Network access S E M I C O N D U C T O R Bt8233 ATM ServiceSAR with S Y S T E M S xBR Traffic Management datasheet PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS September 1998 Bt8233 ATM ServiceSAR with xBR Traffic Management The Bt8233 Service Segmentation and Reassembly Controller integrates in a single
|
Original
|
Bt8233
Bt8233
N8233DSB
BT8233EHFB
5969b
l8233
|
PDF
|
BT8233
Abstract: designe Alarm Clock I960CA rockwell E3 plus CRC10 CRC32 CRC-32 BT8233E IC 7431 IC Data-book
Text: Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. Bt8233 ATM ServiceSAR with xBR Traffic Management The Bt8233 Service Segmentation and Reassembly Controller integrates ATM terminal
|
Original
|
Bt8233
Bt8233
designe Alarm Clock
I960CA
rockwell E3 plus
CRC10
CRC32
CRC-32
BT8233E
IC 7431
IC Data-book
|
PDF
|
BSDE
Abstract: I960CA pinout of bel 187 transistor RS8250 CRC10 RS8234 SCR SN 101
Text: Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal
|
Original
|
RS8234
RS8234
BSDE
I960CA
pinout of bel 187 transistor
RS8250
CRC10
SCR SN 101
|
PDF
|
|
|
I960CA
Abstract: CRC10 RS8234 RS8250 on-demand multicast messages
Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and
|
Original
|
RS8234
RS8234
28234-DSH-001-B
I960CA
CRC10
RS8250
on-demand multicast messages
|
PDF
|
RFC-2684
Abstract: tcam M27483 ip dslam CRC-10 RFC2684 TCAM insert route
Text: Firmware for TSP3 Traffic Stream Processors BroadbandMaker Ethernet-to-ATM Interworking and ATM > Switching with “Triple-Play” Traffic Management for Broadband Access Equipment Product Overview BroadbandMaker™ foundation firmware, designed for Mindspeed’s TSP3 processors, provides the industry’s best
|
Original
|
|
PDF
|
Untitled
Abstract: No abstract text available
Text: RS8235 Endstation ATM ServiceSAR with xBR Traffic Management The RS8235 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and
|
Original
|
RS8235
RS8235
RS8234
RS8235;
28235-DSH-001-B
|
PDF
|
Untitled
Abstract: No abstract text available
Text: RS8235 Endstation ATM ServiceSAR with xBR Traffic Management The RS8235 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and
|
Original
|
RS8235
RS8235
RS8234
RS8235;
00407A
|
PDF
|
CN8234
Abstract: BT82
Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and
|
Original
|
RS8234
RS8234
28234-DSH-001-A
CN8234
BT82
|
PDF
|
6233I
Abstract: BSDE RS8234 RS8235 RS8250 2790L marking code VBRC
Text: RS8235 Endstation ATM ServiceSAR with xBR Traffic Management The RS8235 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and
|
Original
|
RS8235
RS8235
RS8234
RS8235;
28235-DSH-001-C
6233I
BSDE
RS8250
2790L
marking code VBRC
|
PDF
|
Untitled
Abstract: No abstract text available
Text: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and
|
Original
|
RS8234
RS8234
00413A
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Product Brief Freescale Semiconductor, Inc. Q-5 TRAFFIC MANAGEMENT COPROCESSOR Features • Support for ATM Traffic Management 4.1, IP DiffServ, IntServ, and MPLS QoS • Up to 12 million enqueuedequeue operations per second • Protocol-independent per-flow and per-VC
|
Original
|
|
PDF
|
CS533
Abstract: CS5333
Text: CS5333 Porto-200 – OC-48 Multi Service Traffic Manager and SAR OVERVIEW The Porto-200 CS5333, a member of the Porto Multi-Service Traffic Manager family of products, is a single chip solution for implementing ATM or Packet Traffic Management, Switching and ATM Segmentation and
|
Original
|
CS5333
Porto-200
OC-48
Porto-200
CS5333,
F5333001204
CS533
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary PM Datasheet PMC-980618 PMC-Sierra, Inc. Issue 2 PM 73487 QRT 622 Mbps ATM Traffic Management Device PM73487 QRT 622 Mbps ATM Traffic Management Device DATASHEET Preliminary Issue 2: October 1998 m room'll DDEisaa 7^? n _ PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
|
OCR Scan
|
PMC-980618
PM73487
PM73487
73487-P
|
PDF
|
