AS80SSTVF16859 Search Results

AS80SSTVF16859 Datasheets (4)

Part	Manufacturer	Description	Datasheet Type	PDF
AS80SSTVF16859-56KR	Alliance Semiconductor	Logic ICS, DDR 13-Bit To 26-Bit Registered Buffer, Tape And Reel	Original	PDF
AS80SSTVF16859-56KT	Alliance Semiconductor	Logic ICS, DDR 13-Bit To 26-Bit Registered Buffer	Original	PDF
AS80SSTVF16859-64TR	Alliance Semiconductor	Logic ICS, DDR 13-Bit To 26-Bit Registered Buffer, Tape And Reel	Original	PDF
AS80SSTVF16859-64TT	Alliance Semiconductor	Logic ICS, DDR 13-Bit To 26-Bit Registered Buffer	Original	PDF

AS80SSTVF16859 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
PC3200 Abstract: Q11A Q13A PC2100 PC2700 Text: August 2003 Advance Information PulseC re AS80SSTVF16859 DDR 13-Bit to 26-Bit Registered Buffer Features Recommended Applications • • • • • Differential clock signals Meets SSTL_2 class II specifications on outputs Low voltage operation – VDD = 2.3 V to 2.7 V	Original	AS80SSTVF16859 13-Bit 26-Bit 64-pin 56-pin PC3200 Q11A Q13A PC2100 PC2700	PDF
PCV857-025 Abstract: 40mr Text: August 2003 Advance Information PulseC re AS80CVF857 2.5 V Wide-Range Frequency Clock Driver 60 MHz - 200 MHz Specification: Features • • • • • • • Low skew, low jitter PLL clock driver 1 to 10 differential clock distribution (SSTL_2)	Original	AS80CVF857 PCV857-025 PCV857-130 PC3200 AS80DQFH AS80CVF857-48TT AS80CVF857-48TR AS80CVF857-48VT AS80CVF857-48VR AS80CVF857-56BT PCV857-025 40mr	PDF

Catalog Datasheet

MFG & Type

Document Tags

PDF

PC3200

Abstract: Q11A Q13A PC2100 PC2700
Text: August 2003 Advance Information PulseC re AS80SSTVF16859 DDR 13-Bit to 26-Bit Registered Buffer Features Recommended Applications • • • • • Differential clock signals Meets SSTL_2 class II specifications on outputs Low voltage operation – VDD = 2.3 V to 2.7 V

Original

AS80SSTVF16859 13-Bit 26-Bit 64-pin 56-pin PC3200 Q11A Q13A PC2100 PC2700

PDF

PCV857-025

Abstract: 40mr
Text: August 2003 Advance Information PulseC re AS80CVF857 2.5 V Wide-Range Frequency Clock Driver 60 MHz - 200 MHz Specification: Features • • • • • • • Low skew, low jitter PLL clock driver 1 to 10 differential clock distribution (SSTL_2)