AS7C33 Search Results

AS7C331MNTD32A

Abstract: AS7C331MPFD32A AS7C332MPFD18A AS7C332MPFS18A
Contextual Info: November 2004 AS7C331MNTD32A AS7C331MNTD36A 3.3V 1M x 32/36 Pipelined SRAM with NTDTM Features • Organization: 1,048,576 words × 32 or 36 bits • NTD architecture for efficient bus operation • Fast clock speeds to 200 MHz • Fast clock to data access: 3.2/3.5/3.8 ns

AS7C33512NTD36A

Contextual Info: Advance information June 2001 AS7C33512NTD32A AS7C33512NTD36A 3.3V 512Kx32/36 SRAM with NTDTM Features • Organization: 524,288 words × 32 or 36 bits • NTD architecture for efficient bus operation • Fast clock speeds to 200 MHz in LVTTL/LVCMOS

dsp processor Architecture of TMS320C6X

Abstract: AS7C33256PFD16A AS7C33256PFD18A AS7C33256PFS16A AS7C33256PFS18A TMS320C6X
Contextual Info: March 2001 AS7C33256PFD16A AS7C33256PFD18A 3.3V 256K x 16/18 pipeline burst synchronous SRAM Features • Organization: 262,144 words × 16 or 18 bits • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/3.8/4.0/5.0 ns • Fast OE access time: 3.5/3.8/4.0/5.0 ns

AS7C331MNTD18A

Abstract: AS7C331MPFD18A AS7C331MPFS18A
Contextual Info: October 2001 Advanced Information AS7C331MPFD18A 3.3V 1M x 18 pipeline burst synchronous SRAM Features • Asynchronous output enable control • Organization: 1,048,576 x 18bits • Economical 100-pin TQFP package • Fast clock speeds to 200MHz in LVTTL/LVCMOS

Contextual Info: May 2004 AS7C33512NTF32A AS7C33512NTF36A 3.3V 512K x 32/36 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 524,288 words × 32 or 36 bits NTD 1 architecture for efficient bus operation

Contextual Info: AS7C33128PFD18B May 2004 3.3V 128K x 18 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • • • • Organization: 131,072 words × 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/4.0 ns

Contextual Info: August 2004 AS7C33512FT18A 3.3V 512K x 18 Flow-through synchronous SRAM Features • • • • • • • • • • • Organization: 524,288 words × 18 bits Fast clock to data access: 7.5/8.5/10ns Fast OE access time: 3.5/4.0/4.0 ns Fully synchronous flow-through operation

Contextual Info: Advanced Information July 2001 AS7C331MPFD18A 3.3V 1M x 18 pipeline burst synchronous SRAM Features • Asynchronous output enable control • Organization: 1,048,576 x 18bits • Economical 100-pin TQFP package • Fast clock speeds to 200MHz in LVTTL/LVCMOS

AS7C33256PFS18B-166TQC

Contextual Info: AS7C33256PFS16B AS7C33256PFS18B October 2003 3.3V 256K x 16/18 pipeline burst synchronous SRAM Features •Byte write enables •Multiple chip enables for easy expansion •3.3V core power supply •2.5V or 3.3V I/O operation with separate VDDQ •30 mW typical standby power in power down mode

Contextual Info: AS7C33256PFS16A AS7C33256PFS18A December 2002 3.3V 256K x 16/18 pipeline burst synchronous SRAM Features • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ • 30 mW typical standby power in power-down mode

MA1022

Contextual Info: October 2003 AS7C331MPFS18A 1M x 18 pipelined burst synchronous SRAM Features • Organization: 1,048,576 x18 bits • Fast clock speeds to 166MHz in LVTTL/LVCMOS • Fast clock to data access: 3.4/3.8 ns • Fast OE access time: 3.4/3.8 ns • Fully synchronous register-to-register operation

Contextual Info: January 2002 AS7C33128PFD32A AS7C33128PFD36A 3.3V 128K x 32/36 pipeline burst synchronous SRAM Features • Organization: 131,072 words × 32 or 36 bits • Fast clock speeds to 200 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.0/3.1/3.5/4.0/5.0 ns

A311d

Contextual Info: December 2002 AS7C33128PFS32A AS7C33128PFS36A 3.3V 128K X 32/36 pipeline burst synchronous SRAM Features • • • • Organization: 131,072 words x 32 or 36 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/4.0/5.0 ns

Contextual Info: February 2002 AS7C33256NTD32A AS7C33256NTD36A Š 9 .î 65$0 ZLWK 17'TM 1 Features • Organization: 262,144 words x 32 or 36 bits • NTD 1 architecture for efficient bus operation • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.0/3.5/3.8/4/5 ns

Contextual Info: AS7C33256PFS16A AS7C33256PFS18A September 2002 3.3V 256K x 16/18 pipeline burst synchronous SRAM Features • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ • 30 mW typical standby power in power-down mode

Contextual Info: AS7C33256PFD16A AS7C33256PFD18A December 2002 3.3V 256K x 16/18 pipeline burst synchronous SRAM Features • Organization: 262,144 words × 16 or 18 bits • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/4.0/5.0 ns • Fast OE access time: 3.5/4.0/5.0 ns

V17H

Contextual Info: February 2002 AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM Features • • • • • • • • • • • • • • • • • Organization: 524,288 words × 16 or 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS

Contextual Info: August 2002 Advance Information AS7C33512PFS32A AS7C33512PFS36A 3.3V 512K x 32/36 pipelined burst synchronous SRAM Features • • • • • • • • • • • • • • • • • • Organization: 524,288 words × 32 or 36 bits Fast clock speeds to 250MHz in LVTTL/LVCMOS

AS7C331MPFS36

Contextual Info: April 2004 AS7C331MPFD32A AS7C331MPFD36A 3.3V 1M x 32/36 pipelined burst synchronous SRAM Features • • • • • • • • • • • • • • • • • Organization: 1,048,576 words × 32 or 36 bits Fast clock speeds to 200 MHz in LVTTL/LVCMOS

RQW 130

Contextual Info: August 2002 Advance Information AS7C33512NTD32A AS7C33512NTD36A Š 9 . î  65$0 ZLWK 17'TM Features • Organization: 524,288 words x 32 or 36 bits • NTD 1 architecture for efficient bus operation • Fast clock speeds to 250 MHz in LVTTL/LVCMOS

Contextual Info: April 2004 AS7C331MFT32A AS7C331MFT36A 3.3V 1M x 32/36 Flow-through synchronous SRAM Features • • • • • • • • • • • Organization: 1,048,576 words × 32 or 36 bits Fast clock to data access: 6.5/7.5/8.5 ns Fast OE access time: 3.5/3.5/4.0 ns

Contextual Info: November 2000 Advance Information AS7C33512PFS16A AS7C33512PFS18A 3.3V 512K x 16/18 pipeline burst synchronous SRAM Features • Organization: 524,288 words × 16 or 18 bits • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/3.8/4.0/5.0 ns

Contextual Info: Advance Information August 2001 AS7C33512PFS16A AS7C33512PFS18A 3.3V 512K x 16/18 pipeline burst synchronous SRAM Features • Pentium®* compatible architecture and timing • Asynchronous output enable control • Economical 100-pin TQFP package • Byte write enables

Contextual Info: February 2005 AS7C33128NTF32B AS7C33128NTF36B 3.3V 128K x 32/36 Flowthrough Synchronous SRAM with NTDTM Features • • • • • • • • • • • • • • • • Organization: 131,072 words × 32 or 36 bits NTD architecture for efficient bus operation