ARCHITECTURE IN 4289 Search Results

WEDSP32C

Contextual Info: — * Microelectronics WE DSP32C Digital Signal Processor Introduction Description AT&T is the industry leader in floating-point digital signal processing. AT&T's DSP32 architecture was introduced in 1985 and is now the accepted standard in the speech, signal processing,

WE-DSP32C

Abstract: we dsp32 7495 4-bit shift register dsp32c WEDSP32 dsp32 att OXE800 AT&T dsp32 PDB11 sy 164
Contextual Info: NOV i l 19M . Data Sheet ^ AT&T r Microelectronics WIE DSP32C Digital Signal Processor Introduction Description AT&T is the industry leader in floating-point digital signal processing. AT&T's DSP32 architecture was introduced in 1985 and is now the accepted

Contextual Info: NOV 1 1 199« _ ^ Data Sheet jÄ liT r Microelectronics l/ME DSP32C Digital Signal Processor Introduction Description AT&T is the industry leader in floating-point digital signal processing. AT&T's DSP32 architecture was introduced in 1985 and is now the accepted

Contextual Info: in te i. 28F200BL-T/B, 28F002BL-T/B 2-MBIT 128K x 16, 256K x 8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY • Low Voltage Operation for Very Low Power Portable Applications — Vcc = 3.0V-3.6V ■ Expanded Temperature Range 20°C to +70°C ■ x8/x16 Input/Output Architecture

intel 4308

Contextual Info: in te l 1-MBIT 128K X 8 BOOT BLOCK FLASH MEMORY 2 8 F 0 0 1B X - T /2 8 F 0 0 18 X - B / 2 8 F 0 0 1 B N - T /2 8 F 0 0 1B N - B High-lntegration Blocked Architecture — One 8 KB Boot Bfock w/Lock Out — Two 4 KB Parameter Blocks — One 112 KB Main Block

DSP16A

Abstract: WE DSP16A dsp16a user guide we dsp32 at&t dsp dsp32c G010343 XWXX "saturation value" xlxxx
Contextual Info: A T & T HELEC I C bME D • D D S D O S b D D 1 0 32 7 77^ M A T T E INTRODUCTION Architecture 1. INTRODUCTION The WE DSP16A Digital Signal Processor is a 16-bit, high-performance, CMOS integrated circuit. This device can be programmed to perform a wide variety of signal-processing functions. This is the DSP

DSP3210

Abstract: DSP32C
Contextual Info: A T & T MELEC I C b4E » • 005002b DDlDflME STT ■ ATT2 DSP3210 Information Manual Introduction 1. INTRODUCTION The AT&T DSP3210 brings the power of floating-point signal processing to personal computers and workstations opening a wide range of multimedia applications. From its conception, the DSP3210 has been engineered with a

DSP3210

Abstract: DSP32C AT&T dsp32 DSP32 Floating-Point Arithmetic at&t dsp dsp32 att 3d graphics IS3938 motorola idp
Contextual Info: A T & T MELEC I C b4E » • 005002b DDlDflME STT ■ ATT2 DSP3210 Information Manual Introduction 1. INTRODUCTION The AT&T DSP3210 brings the power of floating-point signal processing to personal computers and workstations opening a wide range of multimedia applications. From its conception, the DSP3210 has been engineered with a

ATT65630

Abstract: 65630 ATT65654 ci 7495 ATT65636 ttl 7495 ATT65640 ATT65646 ATT65650 ATT65658
Contextual Info: Product Brief = AT&T F Microelectronics ATT656 Series CMOS Gate Arrays Features Description • 1.0 im CMOS Si-gate triple-layer metal process technology; 0.75 |xm effective channel length The ATT656 series of CMOS gate arrays combines the leading edge technology necessary

Contextual Info: Data Sheet January 1992 ; a at&t M in ro ftlftrtro n ics T7290 DS1/T1/CEPT Line Interface Features Description • Fully integrated DS 1 / T 1 /CEPT line interface The T7290 DS1/T1/CEPT Line Interface is a single­ chip, CMOS line transceiver capable of operation at

Contextual Info: Data Sheet March 1992 l M a t& t M icroelectronics T7290 DS1/T1/CEPT Line Interface Features Description • Fully integrated DS1/T1/CEPT line interface The T7290 DS1/T1/CEPT Line Interface is a single­ chip, CMOS line transceiver capable of operation at

Contextual Info: Product Brief — Microelectronics ATT656 Series CMOS Gate Arrays Features Description • 1.0 |j.m CMOS Si-gate triple-layer metal process technology; 0.75 |^m effective channel length The ATT656 series of CMOS gate arrays combines the leading edge technology necessary

K9686-B

Contextual Info: PreliminaryData Sheet February1992 ; s AT&T '^^^’Microelectronics T7240A Twisted-Pair Port Transceiver TPORT2 Issue 1.0 Features Description • Compliance with IEEE Std. 802.3M 990 10BASE-T standard The T7240A Twisted-Pair Port Transceiver (TPORT2) simplifies the design and implementation of one

AM79C930

Abstract: 20NF20 Introduction to communication systems stremler mobile jammer circuit AN9624 AN9810 AND-C-107 HFA3424 circuit diagram of 6 channel 2.4ghz rf transmitter HFA3624
Contextual Info: 2.4GHz Direct Sequence Wireless LAN Cascade Analysis September 1998 AN9810 Authors: Robert Rood, Doug Schultz Abstract The paper describes the cascade analysis of an IEEE 802.11 direct sequence wireless LAN radio in the 2.4GHz ISM band. A step by step approach is taken including: Basic

MPC5673

Abstract: MPC5645 HCS08/ARM JTAG Programmer Schematics MC9S12ZVM
Contextual Info: CodeWarrior Development Studio for Microcontrollers V10.x Targeting Manual Document Number: CWMCUDBGUG Rev 10.5, 09/2013 CodeWarrior Development Studio for Microcontrollers V10.x Targeting Manual, Rev. 10.5, 09/2013 2 Freescale Semiconductor, Inc. Contents

AN98

Abstract: advantages of mobile signal jammer circuit analog to digital converter ieee 802.11 Murata rf filter Introduction to communication systems stremler mobile jammer mobile jammer circuit HFA3925 AM79C930 HFA3424
Contextual Info: [ /Title AN98 10 /Subject (2.4G Hz Direct Sequen ce Wireless LAN Cascade Analysis) /Autho r () /Keywords (Intersil Corporation, Semiconductor, PRIS M, Wireless Communications , RF, 2.4GHz Direct Sequence Wireless LAN Cascade Analysis TM Application Note

transformer EC-28

Abstract: t7240a 0921e 7495 dip switch pin diagram of ic 7495 TWISTED PAIR WIRE PE65263 T7240A-EC T7240A-PC PE32101
Contextual Info: MAR 2 r Yi-u Preliminary Data Sheet February 1992 ; ^ AT&T M icroelectronics T7240A Twisted-Pair Port Transceiver TPORT2 Issue 1.0 Features Description • Compliance with IEEE Std. 802.3M 990 10BASE-T standard The T7240A Tw isted-P air Port T ransceiver (TPORT2)

Contextual Info: Data Sheet February 1992 ATT7C157 m A T& T Microelectronics High-Speed CMOS Cache SRAM 256 Kbit 16K x 16 RISC-Based, Self-Timed, Latched Data I/O Features High speed — 15 ns maximum access time TTL compatible inputs and outputs Easy interface with SPARC' RISC architecture

ci 7495

Abstract: capacitor 107 16k 7C602 ATT7C157M-20 att cache
Contextual Info: HAR . ja;* Data Sheet February 1992 ATT7C157 m A T& T M icroelectronics High-Speed CMOS Cache SRAM 256 Kbit 16K x 16 RISC-Based, Self-Timed, Latched Data I/O Features High speed — 15 ns maximum access time TTL compatible inputs and outputs Easy interface with SPARC* RISC architecture

Contextual Info: MP7652 Z T E X A 4-C hannel Voltage Output 15 M H z, Input Bandwidth, 8-Bit Multiplying DACs with 3-W ire Serial Digital Port and Independent References R FEATURES • Low Harmonic Distortion: 0.25% typical with Vref = 1 V p-p @ 1 MHz • Vre f/2 Output Preset Level

motorola 68hc705 programming guide

Abstract: 68HC12 microcontroller electronic stethoscope circuit diagram HMI-200 Telefunken supertap emulator 68302 installation guide M68HC11-F mc68hc11evb tag 8944 semiconductors cross index
Contextual Info: 1999 MOTOROLA MICROCONTROLLER DEVELOPMENT TOOLS DIRECTORY Design Support for the M68HCO5, M68HCO8, M68HC11, M68HC12, M68HC16, M68300, and MPC500 Families 1999 Edition 1999 Motorola, Inc All Rights Reserved Table of Contents MOTOROLA Table of Contents Development Tools Index by

TR GmbH CE 65 M

Contextual Info: ^ _ Advance Data Sheet ATT7C340 | A O T Microelectronics High-Speed CMOS 1 Mbit 128K x 8 SRAM Synchronous, Pipelined Architecture TTL Compatible Common I/O Features • 128K by 8-bit synchronous registered SRAM with common I/O ■ Registered addresses, data I/O, WE , GE , and

Contextual Info: MP7642 M . Micro Power Systems ¡111, Si » ! 16-Channel High-Speed Non-Inverting Two Quadrant Multiplying 8-Bit DACs with Output Buffer and Serial Digital Data Port with Parallel Chip Address Decoder Option . FEATURES • 16 Independent 2-Quadrant Multiplying

Contextual Info: Advance Data Sheet February 1992 ATT7C343 ^ A T & T — Microelectronics High-Speed CMOS 1 Mbit 64K x 18 SRAM Synchronous, Pipelined Architecture TTL Compatible Common I/O Features • High speed — 10 ns maximum access times ■ Fully pipelined architecture