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    ALTERA FPGA Search Results

    ALTERA FPGA Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    ADC1213D080WO-DB Renesas Electronics Corporation ADC1213D080WO demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through specific connectors Visit Renesas Electronics Corporation
    ADC1413D065WO-DB Renesas Electronics Corporation ADC1413D065W0 demoboard; compliant with Lattice, Altera, Xilinx FPGA boards through specific connectors Visit Renesas Electronics Corporation
    ADC1443D200WO-DB Renesas Electronics Corporation ADC1443D200W0 demo board; compliant with Altera, Xilinx FPGA boards through specific connectors Visit Renesas Electronics Corporation
    ADC1443D125WO-DB Renesas Electronics Corporation ADC1443D125W0 demo board; compliant with Altera, Xilinx FPGA boards through specific connectors Visit Renesas Electronics Corporation
    ADC1453D250WO-DB Renesas Electronics Corporation ADC1453D250WO demo board; compliant with Altera, Xilinx FPGA boards through specific connectors Visit Renesas Electronics Corporation

    ALTERA FPGA Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    9524 pc

    Abstract: cp-01035 IC K140 90 nm hspice
    Text: DesignCon 2008 A Fast Algorithm to Instantly Predict FPGA SSN for Various I/O Pin Assignments Geping Liu, Altera Corporation [gliu@altera.com] Zhuyuan Liu, Altera Corporation Kundan Chand, Altera Corporation San Wong, Altera Corporation Kaiyu Ren, Altera Corporation


    Original     		PDF CP-01035-1 9524 pc cp-01035 IC K140 90 nm hspice

    DDR PHY ASIC

    Abstract: ddr ram memory ic CP-01024-1 FLEX10K DDR2-800
    Text: DesignCon 2007 Calibration Techniques for HighBandwidth Source-Synchronous Interfaces Manoj Roge, Altera Corporation Andy Bellis, Altera Corporation Phil Clarke, Altera Corporation Joseph Huang, Altera Corporation Mike Chu, Altera Corporation Yan Chong, Altera Corporation


    Original     		PDF CP-01024-1 DDR PHY ASIC ddr ram memory ic FLEX10K DDR2-800

    leon3

    Abstract: processors hardware report ALTERA FPGA
    Text: Altera Innovate Nordic 2007: Leon3 MP on Altera FPGA, Final Report Altera Innovate Nordic 2007 Final Project Report 8/28/2007 1 Altera Innovate Nordic 2007: Leon3 MP on Altera FPGA, Final Report Project name: Leon3 MP on Altera FPGA Team name: Team Hervanta


    Original     		PDF IN00000033 leon3 processors hardware report ALTERA FPGA

    VR 10K preset

    Abstract: Signal Path Designer
    Text: DesignCon 2008 A Reset Control Apparatus for PLL Power-Up Sequence and Auto-Synchronization Kazi Asaduzzaman, Altera Corporation Tim Hoang, Altera Corporation Kang-Wei Lai, Altera Corporation Wanli Chang, Altera Corporation Leon Zheng, Altera Corporation Mian Smith, Altera Corporation


    Original     		PDF CP-01037-1 VR 10K preset Signal Path Designer

    351nF DesignCon 2010 Analysis FPGA Noise Propagation Package Modeling Altera Corporation

    Abstract: 400um XCItepi powersi 50GHZ 351nF Design Seminar Signal Transmission Fabrication process steps metal core pcb
    Text: DesignCon 2010 Analysis of FPGA PDN Noise Propagation by Die & Package 3D Modeling Zhe Li, Altera Corporation ZLI@altera.com Dr. Hong Shi, Altera Corporation hshi@altera.com Kenneth Kwan, Altera Corporation kkwan@altera.com Dr. John Y. Xie, Altera Corporation


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    INTERPOLATOR 6 BITS SIN COS DATA CLK

    Abstract: CP-01066-1 altera 48 fpga
    Text: DesignCon 2010 An On-Die Scope Based on a 40-nm Process FPGA Transceiver Weichi Ding, Altera Corporation Email: weding@altera.com Mingde Pan, Altera Corporation Email: mpan@altera.com Tina Tran, Altera Corporation Email: ttran@altera.com Wilson Wong, Altera Corporation


    Original     		PDF 40-nm CP-01066-1 INTERPOLATOR 6 BITS SIN COS DATA CLK altera 48 fpga

    vhdl code for lcd display

    Abstract: vhdl code for deserializer verilog code for lvds driver sdi verilog code vhdl code for lvds driver SDI pattern generator vhdl code for rs232 altera audio file in vhdl code vhdl code scrambler Altera Cyclone III
    Text: National SD/HD/3G SDI SERDES & Altera Cyclone III Development Board Hardware Components Altera Cyclone III Development Board Altera EP3C120 FPGA in 780-pin BGA package Altera MAX II EPM2210G CPLD 2 x HSMC expansion connectors 256 MByte DDR2 SDRAM 64 MByte parallel flash memory


    Original     		PDF EP3C120 780-pin EPM2210G LMH0344 LMH0341 RP219 RS-232 LMH1981 LMH1982 vhdl code for lcd display vhdl code for deserializer verilog code for lvds driver sdi verilog code vhdl code for lvds driver SDI pattern generator vhdl code for rs232 altera audio file in vhdl code vhdl code scrambler Altera Cyclone III

    LMS adaptive filter model for FPGA

    Abstract: hyperlynx 90 nm hspice FIR filter matlaB design altera digital graphic equalizer ic LMS matlab CP-01025-1
    Text: Equalization Challenges for 6-Gbps Transceivers Addressed by PELE—A Software-Focused Solution! Tina Tran, Altera Corporation Gary Pratt, Mentor Graphics Corporation Kazi Asaduzzaman, Altera Corporation Mei Luo, Altera Corporation Simar Maangat, Altera Corporation


    Original     		PDF CP-01025-1 LMS adaptive filter model for FPGA hyperlynx 90 nm hspice FIR filter matlaB design altera digital graphic equalizer ic LMS matlab

    10K60

    Abstract: 10K30 10k-60 ALTERA 10K70 FPGA 10K50 altera 48 fpga 10K40 ATC-ALTER-50
    Text: ATC-ALTERA Industry Pack FPGA with 512 kB SRAM Industry Pack ALTERA 10K-70K SERIES FPGA w/ memory FEATURE SUMMARY ATC-ALTERA- XX Functional Block Diagram IP local bus Connector Control Logic • • • • • • • • • • • • ALTERA FPGA 512 kiloByte of external SRAM


    Original     		PDF 10K-70K ATC-ALTER-20 ATC-ALTER-30 ATC-ALTER-40 ATC-ALTER-50 ATC-ALTER-60 ATC-ALTER-70 10K20 10K30 10K40 10K60 10K30 10k-60 ALTERA 10K70 FPGA 10K50 altera 48 fpga 10K40 ATC-ALTER-50

    F487 transistor

    Abstract: 2A86 transistor D889 65e9 4B71 65e9 transistor ix 2933 F487 529B 0674
    Text: Altera Software Installation and Licensing Version 10.0 Altera Software Installation and Licensing Version 10.0 Altera Corporation 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com Altera Software Installation and Licensing Version 10.0


    Original     		PDF MNL-01054-1 F487 transistor 2A86 transistor D889 65e9 4B71 65e9 transistor ix 2933 F487 529B 0674

    pll 02 a

    Abstract: 800E-02 finite state machine frequency detection using FPGA
    Text: DesignCon 2009 Method and Apparatus of Continuous PLL Adaptation to Variable Reference Input Frequency Tim Hoang, Altera Corporation Sergey Shumarayev, Altera Corporation Kazi Asaduzzaman, Altera Corporation Leon Zheng, Altera Corporation CP-01051-1.0 February 2009


    Original     		PDF CP-01051-1 pll 02 a 800E-02 finite state machine frequency detection using FPGA

    b548

    Abstract: d67b datasheet mb 8719 3BA6 3C37 altera jtag ethernet b824 B824 transistor D896 d975
    Text: Altera Software Installation and Licensing Version 9.1 Altera Software Installation and Licensing Version 9.1 Altera Corporation 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com Altera Software Installation and Licensing Version 9.1


    Original     		PDF MNL-01050-1 b548 d67b datasheet mb 8719 3BA6 3C37 altera jtag ethernet b824 B824 transistor D896 d975

    altera de1

    Abstract: vhdl code for codec WM8731 music keyboard encoder schematic UART using VHDL rs232 driver Altera Cyclone II 2C20 FPGA Board VHDL audio de1 Altera DE1 Board Using Cyclone II FPGA Circuit WM8731 Altera II 2C20 FPGA verilog code for codec WM8731
    Text: Altera DE1 Board DE1 Development and Education Board User Manual Version 1.1 Copyright 2006 Altera Corporation Altera DE1 Board CONTENTS Chapter 1 DE1


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    interlaken rtl

    Abstract: gearbox rev 10 Gbps ethernet phy analog devices select guide 2010 AN320 CRC32 IP-10GBASERPCS xaui xgmii ip core altera interlaken PHY interface for PCI EXPRESS
    Text: Altera Transceiver PHY IP Core User Guide Altera Transceiver PHY IP Core User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01080-1.0 Subscribe Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, and specific device designations


    Original     		PDF UG-01080-1 interlaken rtl gearbox rev 10 Gbps ethernet phy analog devices select guide 2010 AN320 CRC32 IP-10GBASERPCS xaui xgmii ip core altera interlaken PHY interface for PCI EXPRESS

    SCHEMATIC USB to VGA

    Abstract: schematic diagram video converter rca to vga vhdl code for codec WM8731 3 digit seven segment 11 pin display schematic diagram vga to tv pin configuration of seven segment usb video player circuit diagram
    Text: Altera DE2 Board DE2 Development and Education Board User Manual Version 1.5 Copyright 2012 Altera Corporation Altera DE2 Board CONTENTS Chapter 1 DE2


    Original     		PDF

    0.18-um CMOS technology characteristics

    Abstract: 10Gb CDR card fci 0.18-um CMOS technology characteristics 1.2V
    Text: DesignCon 2007 Digitally Assisted Adaptive Equalizer in 90 nm With Wide Range Support From 2.5 Gbps to 6.5 Gbps Now available in Stratix II GX FPGAs: www.altera.com/technology/adce Wilson Wong, Altera Corporation Tin Lai, Altera Corporation Sergey Shumarayev, Altera Corporation


    Original     		PDF CP-01026-1 0.18-um CMOS technology characteristics 10Gb CDR card fci 0.18-um CMOS technology characteristics 1.2V

    MegaCore IP Library

    Abstract: megacore ip
    Text: OpenCore Plus Evaluation of Megafunctions Application Note 320 November 2007, version 1.6 Introduction Altera and Altera Megafunction Partners Program AMPPSM partners offer a broad portfolio of megafunctions optimized for Altera devices. The Altera MegaCore® functions and AMPP megafunctions are reusable


    Original     		PDF

    PEEL programming

    Abstract: T-950 BAT900
    Text: DesignCon 2006 Analysis of FPGA Simultaneous Switching Noise in Three Domains: Time, Frequency, and Spectrum Hong Shi, Altera Geping Liu, Altera Alan Liu, Altera CP-SIMSWIT-1.0 Abstract Simultaneous switching noise SSN and its behavior have become increasingly


    Original     		PDF

    transistor k 4212

    Abstract: EP1K10 EP1K100 EP1K30 EP1K50 adjustable pwm voltage regulator SLUP183
    Text: Application Note TI Power Solutions Power-Up Altera FPGAs Application Note SLUA278 – October 2002 TI Power Solutions Power-Up Altera FPGAs Sophie Chen Power Supply Control Products ABSTRACT Power requirements and power consumptions for Altera FPGAs, including ACEX 1K, APEX


    Original     		PDF SLUA278 transistor k 4212 EP1K10 EP1K100 EP1K30 EP1K50 adjustable pwm voltage regulator SLUP183

    Switching power supplies Delta electronics

    Abstract: design of Electrical Power Distribution transform circuit diagram of mosfet based power supply 200w computer power supply Circuit diagram Altera DDR3 FPGA sampling oscilloscope Q-Tech design of mosfet based power supply computer power supply diagram constant current power supply circuit diagram delta modulation tutorial
    Text: DesignCon 2008 FPGA I/O Timing Variations Due to Simultaneous Switching Outputs Zhe Li, Altera Corporation ZLI@altera.com, 408- 544-7762 Iliya Zamek, Altera Corporation izamek@altera.com, 408- 544-8116 Peter Boyle, Altera Corporation pboyle@altera.com, 408- 544-6939


    Original     		PDF CP-01041-1 Switching power supplies Delta electronics design of Electrical Power Distribution transform circuit diagram of mosfet based power supply 200w computer power supply Circuit diagram Altera DDR3 FPGA sampling oscilloscope Q-Tech design of mosfet based power supply computer power supply diagram constant current power supply circuit diagram delta modulation tutorial

    E3648

    Abstract: GPIB/USB thermal simulation of IC package CG635 oscilloscope schematic EAS 200
    Text: DesignCon 2008 Modeling FPGA Current Waveform and Spectrum and PDN Noise Estimation Iliya Zamek, Altera Corporation izamek@altera.com, 408-544-8116 Peter Boyle, Altera Corporation pboyle@altera.com, 408-544-6939 Zhe Li, Altera Corporation ZLI@altera.com, 408-544-7762


    Original     		PDF CP-01042-1 E3648 GPIB/USB thermal simulation of IC package CG635 oscilloscope schematic EAS 200

    "Constant fraction discriminator"

    Abstract: cti pet Constant fraction discriminator SIEMENS BST vhdl cordic code EPC1064V HP 30 pin lcd flex cable pinout vhdl code for cordic Constant fraction timing discriminator EPF10K50EQI240-2
    Text: & News Views First Quarter, February 2000 The Programmable Solutions Company Newsletter for Altera Customers Altera Provides World-Class HDL Synthesis & Simulation Tools Altera has entered into agreements with Synopsys, Inc., and Mentor Graphics Corporation that enable Altera’s entire


    Original     		PDF

    vhdl code for lcd display for DE2 altera

    Abstract: mp3 altera de2 board altera de2 board sd card VHDL audio codec ON DE2 altera de2 board vga connector de2 altera Schematic LED panel display tv de2 video image processing altera vhdl code for rs232 receiver altera schematic diagram pc vga to tv rca converter
    Text: Altera DE2 Board DE2 Development and Education Board User Manual Version 1.42 Copyright 2008 Altera Corporation Altera DE2 Board CONTENTS Chapter 1 DE2


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    JTRS

    Abstract: autocorrelation sdr on fpga memory bandwidth
    Text: USING C-TO-HARDWARE ACCELERATION IN FPGAS FOR WAVEFORM BASEBAND PROCESSING David Lau Altera Corporation, San Jose, CA, dlau@altera.com Jarrod Blackburn, (Altera Corporation, San Jose, CA, jblackbu@altera.com) Charlie Jenkins (Altera Corporation, San Jose, CA, chjenkin@altera.com)


    Original     		PDF