XQR5VFX130
Abstract: CF1752 XQR5V DIODE BA40 BA5 marking AJ-42 diode Aa42 FF1738 AJ3125 FP1760
Text: Virtex-5QV FPGA Packaging and Pinout Advance Specification Second Quarter 2009 [optional] UG520 v1.1 September 22, 2010 UG520 (v1.1) September 22, 2010 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development
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UG520
XQR5VFX130
CF1752
XQR5V
DIODE BA40
BA5 marking
AJ-42
diode Aa42
FF1738
AJ3125
FP1760
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PDF
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M8260
Abstract: Marking W36 AG34 Frequency detector 31n w6 marking w35 W39 marking AP36
Text: Hardware Design Guide July 2002 TFEC0410G 2.5/10 Gbits/s Optical Networking Interface with Strong/Weak FEC and Digital Wrapper 1 Document Organization This document is primarily intended for designers and engineers whom require I/O characteristics for board
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TFEC0410G
DS02-229SONT
M8260
Marking W36
AG34 Frequency detector
31n w6
marking w35
W39 marking
AP36
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PDF
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diode ak38
Abstract: AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ40 AJ41 AJ42 ag33 diode DIODE BA40 AB-39 ag37 AG40 AB30 F1517 FF1760
Text: Pin Information for the Stratix IV GX EP4SGX530 Device Version 1.4 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1C 1C 1C 1C
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EP4SGX530
PT-EP4SGX530-1
F1760
x32/x36
F1152
F1517
diode ak38
AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ40 AJ41 AJ42
ag33 diode
DIODE BA40
AB-39
ag37
AG40
AB30
FF1760
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PDF
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power supply aps 231
Abstract: au16 tean t1 94 v 0 k1k2 l6 DIN-104 diode ak38 bd l39 G39 T30 motorola STS-192 TDCS4810G
Text: Advance Data Sheet May 2001 TDCS4810G SONET/SDH 10 Gbits/s APS Port and TSI Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ 10 Gbit bidirectional data path with common frame synchronization and clocking. Versatile IC which supports an aggregate bandwidth of 30 Gbits/s.
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TDCS4810G
48-channel
STS-12
STS-192c.
P1149
DS01-150SONT
power supply aps 231
au16
tean t1 94 v 0
k1k2 l6
DIN-104
diode ak38
bd l39
G39 T30 motorola
STS-192
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PDF
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diode ak38
Abstract: ae38 AR-23 AH36 9B101
Text: Advance Data Sheet May 2001 TDCS6440G SONET/SDH 40 Gbits/s Cross Connect Features • ■ ■ ■ ■ ■ ■ ■ ■ Versatile IC which supports an aggregate bandwidth of 40 Gbits/s. Cross Connect Support for line/path switching. ■ Supports up to 768 STS-1 time slots.
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TDCS6440G
64-channel
STS-12
STS-192c.
P1149
DS01-019SONT
DS00-048SONT)
diode ak38
ae38
AR-23
AH36
9B101
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PDF
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diode ak38
Abstract: F1517 AK39 s av36 aw7 diode
Text: Pin Information for the Stratix IV GT EP4S100G5ES1 Device Version 1.2 Notes 1 , (2), (3), (4) WARNING: For ES1 silicon only Bank Number VREF 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A
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EP4S100G5ES1
F1932
PT-EP4S100G5ES1-1
11pins
F1932.
diode ak38
F1517
AK39
s av36
aw7 diode
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PDF
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CQ12B
Abstract: EP4SE530 DIODE BA40 f1517 H1152 DQS30B AL-36 ag33 diode diode ak38 AL34
Text: Pin Information for the Stratix IV E EP4SE530 Device Version 1.1 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1B 1B 1B 1B
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EP4SE530
PT-EP4SE530-1
CQ12B
DIODE BA40
f1517
H1152
DQS30B
AL-36
ag33 diode
diode ak38
AL34
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PDF
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Untitled
Abstract: No abstract text available
Text: Pin Information for the Stratix IV E EP4SE530 Device Version 1.2 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1B 1B 1B 1B
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EP4SE530
PT-EP4SE530-1
F1517
H1517
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PDF
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diode aF38
Abstract: AA30 EP2S180 HC240
Text: Pin Information for HardCopy II HC240 / Stratix® II EP2S180 F1508 Companion Devices Version 1.1 Bank Number VREF Group Pin Name/Function B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 VCCD_PLL7 VCCA_PLL7
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HC240
EP2S180
F1508
diode aF38
AA30
EP2S180
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88E1111
Abstract: LTI-SASF546-P26-X1 Marvell PHY 88E1111 layout Marvell 88E1111 trace layout guidelines 88E1111-B2 -BAB-1I000 Marvell PHY 88E1111 Datasheet Marvell rgmii layout guide 48F4400P0VB00 EVALUATION BOARD 88E1111 88E1111 PHY registers map
Text: Transceiver Signal Integrity Development Kit, Stratix IV GT Edition Reference Manual 101 Innovation Drive San Jose, CA 95134 www.altera.com Document Version: Document Date: 1.0 December 2009 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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AA30
Abstract: EP2S180 HC240
Text: Pin Information for HardCopy II HC240 / Stratix® II EP2S180 F1508 Companion Devices Version 1.1 Bank Number VREF Group Pin Name/Function B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 VCCD_PLL7 VCCA_PLL7
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HC240
EP2S180
F1508
PT-HCS205-1
AA30
EP2S180
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diode T25-4
Abstract: T25-4 L9 K363 equivalent T25-4 d92 02 ad254 AF514 A241 AF125 AN214
Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-4 v2.5 March 14, 2003 Production Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers.
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DS022-4
XCV300E
DS022-1,
DS022-2,
DS022-3,
DS022-4,
diode T25-4
T25-4 L9
K363 equivalent
T25-4
d92 02
ad254
AF514
A241
AF125
AN214
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PDF
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XCV1000E
Abstract: AH273 AF245 diode t25 4 d9 D2641 T25-4 L9 ae3219 DS0224 t2943 T25 4 F8
Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-4 v2.3 November 15, 2001 Preliminary Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers.
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DS022-4
FG1156
XCV3200E
DS022-1,
DS022-2,
DS022-3,
DS022-4,
XCV1000E
AH273
AF245
diode t25 4 d9
D2641
T25-4 L9
ae3219
DS0224
t2943
T25 4 F8
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PDF
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AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ40 AJ41 AJ42
Abstract: BD37 g-15 EP4S100G5
Text: Pin Information for the Stratix IV GT EP4S100G5 Device Version 1.1 Note 1 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1C 1C 1C VREF VREFB1AN0
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EP4S100G5
PT-EP4S100G5-1
AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ40 AJ41 AJ42
BD37
g-15
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EP4SE820
Abstract: diode Aa42 CQ35B FD3055 DIODE BA40 H1152 AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ40 AJ41 AJ42 ad40 diode 1B 1B Y23 DQS35B/CQ35B
Text: Pin Information for the Stratix IV E EP4SE820 Device Version 1.0 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1B 1B 1B 1B
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EP4SE820
PT-EP4SE820-1
diode Aa42
CQ35B
FD3055
DIODE BA40
H1152
AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ40 AJ41 AJ42
ad40 diode
1B 1B Y23
DQS35B/CQ35B
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PDF
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P1152
Abstract: ae301 xcv400e XCV100E XCV200E XCV300E XCV1000E XCV1600E XCV600E FG676
Text: R Virtex-E Pin Definitions Pin Name Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers. These pins become user inputs when not needed for clocks. M0, M1, M2 Yes Input Mode pins are used to specify the configuration mode.
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BG432
BG560
FGF676
FG680
FG456.
DS011
P1152
ae301
xcv400e
XCV100E
XCV200E
XCV300E
XCV1000E
XCV1600E
XCV600E FG676
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PDF
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z1031
Abstract: H10N10 MDC47 VR701 VR121 z1021 VC704 VR753 Z1310 VC558
Text: 5 10 PCIE_REFCLKP (10) PCIE_REFCLKN 4 3 VTP6 TP_22mil_SM_to p DNI PCIE_REFCLKP PCIE_REFCLKN D (10) PCIE_RXP[15.0] (10) PCIE_RXN[15.0] (10) PCIE_TXP[15.0] (10) PCIE_TXN[15.0] PCIE_RXP[15.0] TP_22mil_SM_to p VTP1 DNI PCIE_RXN[15.0] PCIE_TXP[15.0] PCIE_TXN[15.0]
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Z0101
RX10P
RX10N
RX11P
RX11N
RX12P
RX12N
RX13P
RX13N
RX14P
z1031
H10N10
MDC47
VR701
VR121
z1021
VC704
VR753
Z1310
VC558
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PDF
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F1517
Abstract: DQ20B
Text: Pin Information for the Stratix IV GT EP4S100G2 Device Version 1.1 Note 1 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1C 1C 1C 1C VREF VREFB1AN0
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EP4S100G2
PT-EP4S100G2-1
F1517
DQ20B
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EP4S40G5
Abstract: H1517
Text: Pin Information for the Stratix IV GT EP4S40G5 Device Version 1.1 Note 1 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1C 1C 1C 1C VREF VREFB1AN0
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EP4S40G5
PT-EP4S40G5-1
H1517
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PDF
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EP4S40G2
Abstract: F1517
Text: Pin Information for the Stratix IV GT EP4S40G2 Device Version 1.1 Note 1 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1C 1C 1C VREF VREFB1AN0
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EP4S40G2
PT-EP4S40G2-1
F1517
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PDF
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Untitled
Abstract: No abstract text available
Text: Pin Information for the Stratix IV GT EP4S100G5 Device Version 1.2 Note 1 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1C 1C 1C PT-EP4S100G5-1.2
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EP4S100G5
PT-EP4S100G5-1
F1932
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PDF
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EP4SGX360
Abstract: AY30 AB30 F1517 DIODE BA40
Text: Pin Information for the Stratix IV GX EP4SGX360 Device Version 1.5 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1C 1C 1C
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EP4SGX360
PT-EP4SGX360-1
F1760
F1932
x32/x36
F1152
F1517
AY30
AB30
DIODE BA40
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PDF
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CQN10
Abstract: EP4SGX290 AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ40 AJ41 AJ42 AB30 F1517 EP4SGX230 F1517 DIODE BA40
Text: Pin Information for the Stratix IV GX EP4SGX290 Device Version 1.5 Bank Number 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1C 1C 1C
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EP4SGX290
PT-EP4SGX290-1
F1760
F1932
x32/x36
F1152
F1517
CQN10
AJ33 AJ34 AJ35 AJ36 AJ37 AJ38 AJ39 AJ40 AJ41 AJ42
AB30
EP4SGX230 F1517
DIODE BA40
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PDF
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XX11X
Abstract: 242690 Pentium Pro exfo 82453KX
Text: PENTIUM PRO PROCESSOR WITH 1 MB L2 CACHE AT 200 MHZ • Large integrated cache for multiprocessing systems ■ ■ ■ Binary compatible with applications running on previous members of the Intel microprocessor family Separate dedicated external system bus, and dedicated internal full-speed
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OCR Scan
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32-bit
XX11X
242690 Pentium Pro
exfo
82453KX
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PDF
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