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    Untitled

    Abstract: No abstract text available
    Text: HM62W1664H Series HM62W1864H Series P r e lim in a r y 65536-word x 16/18-bit High Speed CMOS Static RAM T h e H M 6 2 W 1 6 6 4 H /H M 6 2 W 1 8 6 4 H is an asyncronous 3.3 V operation high speed static RAM organized as 64 kword x 16/18 bit. It realize h ig h sp eed access tim e 2 5 /3 0 /3 5 /4 5 ns w ith


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    PDF HM62W1664H HM62W1864H 65536-word 16/18-bit 1664H 1864H 400-mil 44-pin 1664HJP-25 1664Hto

    ATT3000

    Abstract: ATT3020
    Text: AT&T Data Sheet July 1992 Microelectronics ATT3000 Series Field-Programmable Gate Arrays FEATURES • High Performance— up to 150 MHz Toggle Rates • User-Programmable Gate Array • I/O functions • Digital logic functions • Interconnections • Flexible array architecture


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    PDF ATT3000 XC3000 ATT3020

    lh531

    Abstract: LH531000B LH531000BN-S LH531000B-S
    Text: L H ^ I n n O R l v / V * v u v - C ^ CMOS 1M 128K x 8 w _ 3 V-D rive M a sk-P ro g ram m a ble ROM FEATURES DESCRIPTION • 131,072 words x 8 bit organization The LH531000B-S is a mask-programmable ROM organized as 131,072 x 8 bits. It is fabricated using


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    PDF LH531000B-S 28-pin, 450-mil LH531000B-S 28-pin LH531000B lh531 LH531000BN-S

    Untitled

    Abstract: No abstract text available
    Text: H M 6 2 W 1 6 6 4 H S e r ie s H M 6 2 W 1 8 6 4 H S e r ie s 65536-w ord x Preliminary 16/18-b it High Speed C M O S Static RAM The H M 6 2 W I6 6 4 H /H M 6 2 W I8 6 4 U is an asynchronous 3.3 V o p e ra tio n high speed static R A M organized as 64 kword x 16/18 bit. It realize


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    PDF 65536-w 16/18-b 1864H 400-mil 44-pin TSOP-11 HM62W1664H/HM62W1864H

    Untitled

    Abstract: No abstract text available
    Text: ADV MI CRO ME MO R Y MÖE D D5S7SSÖ ÜD30b37 5 • AMDM T—46—1 3-25 Am27X040 4 Megabit (524,288 x 8-Bit) CMOS ExpressROM Device Advanced Micro Devices DISTINCTIVE CHARACTERISTICS ■ As an OTP EPROM alternative: - Factory optimized programming


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    PDF D30b37 Am27X040 0205-005A

    Untitled

    Abstract: No abstract text available
    Text: XC3000 Logic Celi “Array Family Product Specification FEATURES The LCA user logic functions and interconnections are determined by the configuration program data stored in internal static memory cells. The program can be loaded in any of several modes to accommodate various system


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    PDF XC3000 XC1736 XC2000 XC3000 XC3020-70PC68C XC2018 XC3020 PGA68, PGA84

    HM62W1664HUP-35

    Abstract: No abstract text available
    Text: HM62W1664H / HM62W1864H Series 65,536-word x 16/18-bit High Speed CMOS Static RAM HITACHI The H M 6 2 W 1 6 6 4 H /H M 6 2 W 1 8 6 4 H is an Ordering Information a s y n c h ro n o u s 3.3 V o p e ra tio n h ig h s p e e d sta tic R A M o r g a n i z e d a s 6 4 - k w o r d x 1 6 /1 8 - b i t. It


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    PDF HM62W1664H HM62W1864H 536-word 16/18-bit HM62W1664HJP-30 HM62W1664HJP-35 HM62W1664HJP-45 HM62W1664HUP-30 HM62W1664HUP-35 HM62W1664HUP-45

    Untitled

    Abstract: No abstract text available
    Text: CMOS 8M 1M x 8 MROM FEATURES • 1,048,576 words x 8 bit organization • Access time: 120 ns (MAX.) PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW 1 • 32 Zl Vcc A ^ IZ 2 31 Zl a 18 A1 5 C 3 30 □ A12IZ 4 29 □ A 14 A7C 5 28 Zl a 13 Aig IZ • Power consumption:


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    PDF 32-pin, 600-mil 525-mil 400-mil 32-PIN A12IZ

    614l

    Abstract: BNXXX
    Text: CMOS SyncBiFlFO WITH BUS-MATCHING AND BYTE SWAPPING 64 X 36 X 2 IDT723614 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB can be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted


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    PDF 36-bits 18-bits IDT723614 MO-136, 727-S11* 492-M PSC-4036 614l BNXXX

    HM658512LP-10V

    Abstract: HM658512LP10
    Text: HM658512 Series 524288-Word x 8-Bit High Speed Pseudo Static RAM Features Ordering Information • Single 5 V ±10% • Highspeed - Access time CE access time: 80/85/100/120 ns - Cycle time Random read/write cycle time: 130/160/190 ns • Low power - 250 mW typ active


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    PDF HM658512 524288-Word 32-pin DP-32) HM658512LP-8V HM658512LP-10V HM658512LP-12V HM658512DP-8 HM658512DP-10 HM658512DP-12 HM658512LP-10V HM658512LP10

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs M6MGB/T160S2BVP 16,777,216-BIT 1,048,576 -WORD BY 16-BIT / 2,097,152-WORD BY 8-BIT CMOS 3.3V-ONLY FLASH MEMORY & 2,097,152-BIT (131,072-WORD BY 16-BIT / 262,144-WORD BY 8-BIT) CMOS SRAM Stacked-MCP (Multi Chip Package) DESCRIPTION FEATURES


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    PDF M6MGB/T160S2BVP 216-BIT 16-BIT 152-WORD 152-BIT 072-WORD 144-WORD M6MGB/T160S2BVP 16M-bits