Y7777 Search Results

Contextual Info: " 1 .0 1 1 -.0 2 0 .2 8 0 .2 8 -5 1 MAX I .3 6 0 MAX. .200 h .1 0 0 4 !_ I ~~L 2° ± 2° t 4‘ PL5 PLC 5 1 - + - = V777Ä MIN 200 1 .3 8 -5 1 Ir = : @ .4 1 0 .015 - . 0 2 0 _ .3 7 5 SO. % % Y7777À T 378 t S 8 fh É r~ . 0 4 5 MIN. .1 0 0 *-004 8 PLC S

Contextual Info: .2 8 0 MAX. .2 8 -.5 1 360 M AX. .200 f— — I— 1 0 0 4 PLCS 3 T C 2° .1 0 0 * 004 8 P L S -1- - 1~ ~ *i l~“* ~ ± 2° $ .0 4 5 MIN. 8 PLCS i 4' .410 Y7777À .200 t . 3 7 8 : '020 030 3 7 t t MIN. l i 5 5Q. MAX. .4 1 0 MIN. RECOMMENDED SO LD ER

Contextual Info: 2 3 4 1 CM m N 10 N 14.9 *0.13 ± 0 .1 3 , ^9.35^ I o A' (0 ^ ^ FIG 1 '<& (RECOMMENDED PANEL OPENING DIMENSION h t- — K » -g» — ^ CTRADE MARK) o > i K CD cc 11 .6 I— ÜJ Y77777Z lEPx â r ih lïP A m c p in H~ H ~ E S < ' < C O N N . INSERTI ON DIR E C T 1ON

Contextual Info: DRAWING No.: M 8 3 - L F C I F 2 N 3 6 -0000-000 Customer Information Sheet I SHEET 2 OF 2 IF IN DOUBT - ASK | g f NOT TO SCALE THIRD ANGLE PROJECTION 10.55- — 2 X 2.00 8.00 (4.0) Y7777/777A SECTION X-X ALL DIMENSIONS IN mm SPECIFICATIONS: MATERIAL: M O ULD ING = G LA S S- F I L L E D PPS, UL94V-0, BLACK

TA76494

Abstract: TC9192 TA8443 QFP60 TA8444F TA8443F TA8444 pll motor control fg fv sta 515 vh va77
Contextual Info: TA8444F PRELIMINARY DATA DOUBLE PLL-PWM 3-PHASE HALL MOTOR PRE-DRIVER TA844F is 3-phase hall motor pre-driver with PLL controller and PWM controller. 8 bit D/A converter system has been employed for each of the speed control system AFC and the phase control system (APC).

TC74HC696P

Abstract: TC74HC697P TC74HC696 Y7777 777X
Contextual Info: TC74HC696P TC74HC697P TC74HC696P TC74HC697P U/D DECADE COUNTER/REGISTER 3-STATE U/D 4-BIT BINARY COUNTER/REGISTER (3-STATE) The TC74rtc696/697 are high speed CMOS up/down counters fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent

f11u

Abstract: FC 0012 TSOP 50 PIN cs-7sa CS7SA k0219 EN5055
Contextual Info: Ordering number : EN5055 _ CMOS LSI No. 5055 LC382161T-17 IS ipîppi; 2 MEG 65536 words x 16 bits x 2 banks Synchronous DRAM J 8¡|lí¡Bí: 1 Overview Package Dimensions The LC382161 series products are 3.3 V single-voltage power supply synchronous DRAMs with a 65536-word x

Contextual Info: 2 5 4 B 6 7 Kontakt-MaPe contact dimensions A Langen der St ec k- und A n s c hl uP s ei t e gel ten fiir ei ngepreOte St ec k ver bi nder (mating and termination length of contacts apply to pressed in connectors) 7x 2 ( = 1 4 ) Kontakt-Typ p in type -

Contextual Info: TA8443F P R E L IM IN A R Y D A T A PLL-PWM 3-PHASE HALL MOTOR PRE-DRIVER TA 8 443F is 3-phase hall m otor pre-driver with PLL c o n troller and PWM controller. 8 bit D / A c o nverter system has b een employed for each of the speed control system AFC and

tney2

Abstract: HM5241 5241605
Contextual Info: HM5241605 Series 131,072-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI A ll inputs and outputs are referred to the rising edge of the clock input. The HM5241605 is offered in 2 banks for improved performance. _ F e a tu re s •3.3V Power s u p p

BI71

Contextual Info: HM5283206 Series 131,072-word x 32-bit x 2-bank Synchronous Graphic RAM HITACHI ADE-203-223A Z Rev. 1.0 May. 30, 1996 Description All inputs and outputs signals refers to the rising edge of the clock input. The HM5283206 provides 2 banks to realize better performance. 8 column block write function and write per bit function are provided for

Contextual Info: A N 7238K AN7238K Single Chip IC for FM-AM IF, AM Tuner, FM MPX Unit : mm • Description The AN7238K is a monolithic integrated circuit designed for FM-AM IF, AM T\iner and FM MPX Demodulation which are most suitable for DTS radio cassette recorder. The chip is encapsulated into 22-lead Shrunk DIL package.

FR72

Contextual Info: TOSHIBA TMP47P850VN TMP47P85ÖVF CMOS 4-Bit Microcontroller The 47P850V is the OTP microcontroller with 64kbits PROM. For program operation, the programming is achieved by using with EPROM programmer TMM2764AD type and adapter socket (BM1161, BM 1165). TMP47P850VN

Contextual Info: ^ Z ilß G P r e lim in ary P r o d u c t S pecificatio n Z85C80 SCSCI S e r ia l C o m m u n ic a t io n s A nd S m a l l c o m p u t e r in t e r f a c e FEATURES • Low power CMOS ■ Local Loopback and Auto Echo modes. ■ Two independent, 0 to 2.5M bit/second, full-duplex

Contextual Info: < £ > Z L G 5 P r o d u c t S pe c if ic a t io n Z5 3 C8 0 S m a l l C o m p u t er S y s t e m I nterface SCSI) FEATURES • DMA or programmed I/O data transfers ■ Direct SCSI bus interface with on-board 48 mA drivers ■ Arbitration support ■ Supports target and initiator roles

Contextual Info: iw“ VITELIC V53C1OOB FAMILY HIGH PERFORMANCE LOW POWER 1M X 1 BIT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY , 60/60L 70/70L 80/80L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns 40 ns Max. CAS Access Time, (tCAC)

R40 AH

Contextual Info: HM5283206 Series 131,072-word x 32-bit x 2-bank Synchronous Graphic RAM HITACHI ADE-203-223A Z Rev. 1.0 May. 30, 1996 Description All inputs and outputs signals refers to the rising edge of the clock input. The HM5283206 provides 2 banks to realize better performance. 8 column block write function and write per bit function are

yj33

Abstract: TC74HC697P
Contextual Info: TC74HC696P TC74HC697P TC74HC696P TC74HC697P U/D DECADE COUNTER/REGISTER 3-STATE U/D 4-BIT BINARY COUNTER/REGISTER (3-STATE) T h e T C 7 4 H C 6 9 6 / 6 9 7 are h i g h s peed CMOS u p / d o w n c o u n t e r s f a b r i c a t e d w i t h s i l i c o n g a t e C 2M O S t e c h n o l o g y .

fifo 512 x 32

Abstract: A0A31 A20C A25C A26C A28C SN74ACT3638 512 X 32 SRAM
Contextual Info: SN74ACT3638 512 x 32 x 2 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS228B - JUNE 1992 - REVISED JUNE 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 512 x 32 Clocked FIFOs Buffering Data in Opposite Directions Read Retransmit Capability From FIFO on

63A23

Contextual Info: Ö3Ö5303 DDDSmb 4bñ « S O N Y CXK48324Q/R SONY 2.4-Mbit 3-port Video Signal Field Memory Description The CXK48324Q/R is a 3-port field memory compatible with both NTSC and PAL standard video signals and is capable of storing one 8-bit field picture with a single chip. The CXK48324Q/R is suitable as a

Contextual Info: HB526C272EN-10IN, HB526C472EN -10IN 1.048.576-word x 72-bit x 2-bank Synchronous Dynamic RAM Module 1.048.576-word x 72-bit x 4-bank Synchronous Dynamic RAM Module HITACHI ADE-203-693C Z Rev. 3.0 May. 15,1997 Description The HB526C272EN, HB526C472EN belong to 8-byte DIMM (Dual In-line Memory Module) family, and

Contextual Info: CHAPTER 5 1 Digital I/O PERI PHERAL Ports The uPD75238 contains T he uPD75238 empl oy s I/O ports All data the ports 8-bit enabled Fig. 5- 1 are m app ed memory I/O of and as HARDWARE FUNCTIONS the to data uPD75238, bit I/O ports, port I / O. This m ea ns

circuit diagram laptop motherboard

Abstract: VK2001 xga-2
Contextual Info: Preliminary Data Sheet March 1992 = AT&T M icroelectro nics ATT20C491,16M Color ATT20C492, 256K Color True-Color CMOS RAMDACs Features Description • 100/80/66/55 MHz operation The ATT20C491/492 CMOS RAMDACs support 24- 18- , 16-, 15-bit true color along with 8-bit

Contextual Info: HM5221605 Series Preliminary 65,536-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI A ll inputs and outputs are referred to the rising edge of the clo ck input. The HM5221605 is offered in 2 banks for improved performance. Features Rev. 0.1 Sep. 22,1994