W941232AD Search Results

W941232AD

Abstract: No abstract text available
Text: W941232AD 1M x 4 BANKS × 32 BIT DDR SDRAM 1. GENERAL DESCRIPTION W941232AD is a CMOS Double Data Rate synchronous dynamic random access memory DDR SDRAM , organized as 1,048,576 words × 4 banks × 32 bits. Using pipelined architecture and 0.175 µm process technology, W941232AD delivers a data bandwidth of up to 800M words per second (-5).