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    SNJ54LV08AW Search Results

    SNJ54LV08AW Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SNJ54LV08AW Texas Instruments OCTAL BUS TRANSCELVERS WITH 3-STATE OUTPUTS Original PDF
    SNJ54LV08AW Texas Instruments Quadruple 2-Input Positive-AND Gates Original PDF

    SNJ54LV08AW Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    LV08A

    Abstract: A115-A C101 SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387I – SEPTEMBER 1997 – REVISED JULY 2003 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 13 4B 2 3 12 4A 4 11 4Y 10 3B 9 3A 5 6 7 8 SN54LV08A . . . FK PACKAGE


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    SN54LV08A, SN74LV08A SCLS387I SN54LV08A LV08A A115-A C101 SN54LV08A SN74LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A SN74LV08A PDF

    A115-A

    Abstract: C101 LV08A SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    SN54LV08A, SN74LV08A SCLS387K SN54LV08A SN74LAmplifiers A115-A C101 LV08A SN54LV08A SN74LV08A PDF

    LV08A

    Abstract: 74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387F – SEPTEMBER 1997 – REVISED AUGUST 2002 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 2 13 4B 3 12 4A 4 11 4Y GND 10 3B 9 3A 5 6 7 8 SN54LV08A . . . FK PACKAGE


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    SN54LV08A, SN74LV08A SCLS387F 000-V A114-A) A115-A) SN54LV08A LV08A 74LV08A PDF

    LV08A

    Abstract: 74LV08A A115-A C101 SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    SN54LV08A, SN74LV08A SCLS387K SN54LV08A SN74L LV08A 74LV08A A115-A C101 SN54LV08A SN74LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    SN54LV08A, SN74LV08A SCLS387L PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


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    SN54LV08A, SN74LV08A SCLS387L PDF

    LV08A

    Abstract: A115-A C101 SN54LV08A SN74LV08A SN74LV08ARGYR 74LV08a
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    SN54LV08A, SN74LV08A SCLS387L LV08A A115-A C101 SN54LV08A SN74LV08A SN74LV08ARGYR 74LV08a PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original
    SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A) PDF

    A115-A

    Abstract: C101 LV08A SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    SN54LV08A, SN74LV08A SCLS387K SN54LV08A SN74Ltrollers A115-A C101 LV08A SN54LV08A SN74LV08A PDF

    LV08A

    Abstract: A115-A C101 SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387E – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D SN54LV08A . . . J OR W PACKAGE SN74LV08A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


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    SN54LV08A, SN74LV08A SCLS387E SN54LV08A 000-V A114-A) A115-A) LV08A A115-A C101 SN54LV08A SN74LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original
    SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A) PDF

    A115-A

    Abstract: C101 LV08A SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387J − SEPTEMBER 1997 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A


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    SN54LV08A, SN74LV08A SCLS387J SN54LV08A A115-A C101 LV08A SN54LV08A SN74LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original
    SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original
    SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original
    SN54LV08A, SN74LV08A SCLS387K SN54LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original
    SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A PDF

    SN74LV08A

    Abstract: A115-A C101 LV08A SN54LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387H – SEPTEMBER 1997 – REVISED OCTOBER 2002 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 13 4B 2 3 12 4A 4 11 4Y 10 3B 9 3A 5 6 7 8 SN54LV08A . . . FK PACKAGE


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    SN54LV08A, SN74LV08A SCLS387H SN54LV08A SN74LV08A A115-A C101 LV08A SN54LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original
    SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce SN54LV08A . . . J OR W PACKAGE SN74LV08A . . . D, DB, DGV, NS,


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    SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A PDF

    lv08a

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original
    SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A) lv08a PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original
    SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A) PDF