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    CC33G

    Abstract: No abstract text available
    Text: CDC587 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _ SCASS62B - DECEMBER 1996 - REVISED JULY 1996 Low-Output Skew and Jitter for Clock Distribution and Synchronization DOG PACKAGE TOP VIEW CLKIN [ 1 u v refÌ 2 FBIN [ 3 Veci 4 FBOUT [ 5


    OCR Scan     		PDF CDC587 SCASS62B CC33G

    Untitled

    Abstract: No abstract text available
    Text: CDC587 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _ SCAS562B- DECEMBER 1996 - REVISED JULY 1998 DQG PACKAGE TOP VIEW • Operates at 3.3-V Vqc • Distributes One Clock Input to 16 Outputs • Four Select Inputs Configure Output


    OCR Scan     		PDF CDC587 SCAS562B-