SCAA034B Search Results

SN74HC logic family

Abstract: AHC 14 CMOS Data Book Texas Instruments Incorporated AHC245 SCLD003A AHCT245 SN74AHC245 SN74AHCT SN74HC SCR Applications Handbook
Contextual Info: Advanced High-Speed CMOS AHC Logic Family SCAA034B January 1998 1 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest

Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417C – JUNE 1998 – REVISED JANUARY 2000 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: SN54AHCT02, SN74AHCT02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS262I – DECEMBER 1995 – REVISED JANUARY 2000 D D SN54AHCT02 . . . J OR W PACKAGE SN74AHCT02 . . . D, DB, DGV, N, OR PW PACKAGE TOP VIEW 1Y 1A 1B 2Y 2A 2B GND 1 14 2 13 3 12 4 11 5 10 6 9

Contextual Info: SN54AHC123A, SN74AHC123A DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS SCLS352F – JULY 1997 – REVISED AUGUST 2000 D D D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Operating Range 2-V to 5.5-V VCC Schmitt-Trigger Circuitry On A, B, and CLR

Contextual Info: SN54AHC245, SN74AHC245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS230H – OCTOBER 1995 – REVISED OCTOBER 2000 D D SN54AHC245 . . . J OR W PACKAGE SN74AHC245 . . . DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per

Contextual Info: SN74AHCT1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCLS380F – AUGUST 1997 – REVISED JANUARY 2000 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per

Contextual Info: SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257J – DECEMBER 1995 – REVISED JANUARY 2000 D D D D EPIC  Enhanced-Performance Implanted CMOS Process Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per

Contextual Info: SN54AHCT595, SN74AHCT595 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS SCLS374G – MAY 1997 – REVISED JUNE 2000 description The ’AHCT595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel

SN74HC138

Contextual Info: SN54HC138, SN74HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS107C – DECEMBER 1982 – REVISED MAY 1997 D D D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception

SCLA014

Contextual Info: SN54AHCT123A, SN74AHCT123A DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS SCLS420E – JUNE 1998 – REVISED AUGUST 2000 D D D D D D description These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A input is low, and the B input

Contextual Info: SN74AHC1G86 SINGLE 2-INPUT EXCLUSIVE-OR GATE SCLS323G – MARCH 1996 – REVISED JANUARY 2000 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per

Contextual Info: SN54AHC273, SN74AHC273 OCTAL D-TYPE FLIP-FLOPS WITH CLEAR SCLS376E – JUNE 1997 – REVISED JANUARY 2000 D D D D D SN54AHC273 . . . J OR W PACKAGE SN74AHC273 . . . DB, DGV, DW, N, OR PW PACKAGE TOP VIEW CLR 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND 1 20 2 19 3 18 4 17

Contextual Info: SN54AHCT373, SN74AHCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS239K – OCTOBER 1995 – REVISED JANUARY 2000 D D D D EPIC  Enhanced-Performance Implanted CMOS Process Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per

Contextual Info: SN54AHCT573, SN74AHCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS243L – OCTOBER 1995 – REVISED JANUARY 2000 D D D D EPIC  Enhanced-Performance Implanted CMOS Process Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per

Contextual Info: SN54AHC273, SN74AHC273 OCTAL D-TYPE FLIP-FLOPS WITH CLEAR SCLS376E – JUNE 1997 – REVISED JANUARY 2000 D D D D D SN54AHC273 . . . J OR W PACKAGE SN74AHC273 . . . DB, DGV, DW, N, OR PW PACKAGE TOP VIEW CLR 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND 1 20 2 19 3 18 4 17

Contextual Info: SN74AHCT1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCLS380F – AUGUST 1997 – REVISED JANUARY 2000 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per

Contextual Info: SN54AHC594, SN74AHC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS423C – JUNE 1998 – REVISED JANUARY 2000 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHC594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: SN54AHCT573, SN74AHCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS243M – OCTOBER 1995 – REVISED MAY 2002 D SN54AHCT573 . . . J OR W PACKAGE SN74AHCT573 . . . DB, DGV, DW, N, NS, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible