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    HD74CDCV851

    Abstract: HD74CDCV851SSEL SSOP-48
    Text: HD74CDCV851 2.5 V PLL Clock Buffer for DDR Application REJ03D02110700Z Previous ADE-205-653F (Z Rev.7.00 Feb.24.2004 Description The HD74CDCV851 is a high-performance, low-skew, low-jitter, PLL clock buffer. It is specifically designed for use with DDR (Double Data Rate) system board application.


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    PDF HD74CDCV851 REJ03D0211 0700Z ADE-205-653F HD74CDCV851 48pin HD74CDCV851SSEL SSOP-48