QS88160 Search Results

Contextual Info: QS88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 FEATURES/BENEFITS • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/Word read/write 20ns/25 ns/30ns/35 ns Taa Available in 52-pin PLCC

AEB DP1

Abstract: 0588 82385 A12A D815
Contextual Info: Q S88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 Q S 88160 Prelim inary FE A T U R E S /B E N E FIT S • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

Contextual Info: QS88180, ô QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 Preliminary FEATURES/BENEFITS • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

A011 transistor

Contextual Info: QS88180, QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses Q 7 QS88180 Q S88160 Preliminary FEATURES/BENEFITS • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables 1or byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

Contextual Info: QS88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 FEATURES/BENEFITS • Dual 4Kx18/16 allows 2-way set associative cache • Byte enables for byte/word read/write • 20ns/25 ns/30ns/35 ns Taa • Available in 52-pin PLCC