QD15B Search Results

BCX53-6

Abstract: BCX51-6 bcx52-6 BCX51 BCX52 BCX53 AB BCX51 BCX51-10 BCX51-16 BCX52 BCX53 BCX54
Contextual Info: □b53^31 N ANER P H I L I P S / D I S C R E T E ObE QD15bö2 b BCX51 BCX52 BCX53 D SILICON PLANAR EPITAXIAL TRANSISTORS Medium power p-n-p transistors in a miniature plastic envelope intended for applications in thick and thin-film circuits. These transistors are intended for general purposes as well as for use in driver stages

Contextual Info: IDT54/74FCT139T/AT/CT FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • The ID T 5 4 /7 4 F C T 1 3 9 T /A T /C T are dual 1-of-4 decoders built using an advanced dual metal C M O S technology. These

Contextual Info: PRELIMINARY 256K32D4 S MT41 LC256K32D4(S) 256K x 32 SGRAM [U II^ P n M I TECHNOLOGY, INC. 256K x 32 SGRAM SYNCHRONOUS GRAPHICS RAM PULSED RAS#, DUAL BANK, PIPELINED, 3.3V OPERATION FEATURES PIN ASSIGNMENT (TOP VIEW) • Fully synchronous; all signals registered on positive

Contextual Info: GEC PLESSEY SENICONDS 43E D • 3?baS22 QGlSfiMl T ■ A P LE S S E Y PLSB ADVANCE INFORMATION S e m ic o n d u c t o r s . MS1005 1024 ELEMENT CCD ANALOGUE STORE The Plessey MS1005 is a clock controlled analogue shift re g is te r fo r a p p lic a tio n s in c lu d in g tim e delay,

Contextual Info: ^ ^ Data Sheet October 1994 Microelectronics DSP1611 Digital Signal Processor 1. Features • IEEE P1149.1 test port JTAG with boundary scan ■ ■ Full-speed in-circuit emulation hardware on-chip Optimized for digital cellular applications with a bit manipulation unit for higher signal coding

Contextual Info: L H 521 0 2 8A CMOS 64K x 18 Static RAM FEATURES • Fast Access Times: 15/17/20/25/35 ns • Wide Word 18-Bits for: - Improved Performance - Reduced Component Count - Nine-bit Byte for Parity andSu are also usedtoenable or disable Read and Write operations on the high and the low bytes. The Address