PR3100A Search Results

R3000A

Abstract: PR3000A R2000A
Contextual Info: PACEWRAP PR3100A WRITE/READ AND PARITY BUFFER P lE U M O N ñ O W FEATURES: Supports data writes while streaming • 8-word write buffer with byte-gathering capability ■ Read buffer with programmable depth of up to 32 words ■ Intelligent read buffer controller significantly

MPS 2112

Abstract: dd1555 R3000A PR2000 PR31 MIPS R2000 PR3010A PR3000A td70c R2000 mips processor
Contextual Info: PE R FO R M A N CE SEMICONDUCTOR 50E D 7 0 b 2 S li 7 • ÜDD1SS1 PERFORMANCE INTEGRATED MIPS MODULE PIMM" 713 «PSC PffiEBJIIlflDNAIHIV FEATURES: ■ Single VLSI muttichip module contains: • PR3000A CPU • PR3010A FPA • PR3100A Write/Read and Parity Buffer

74fct244a

Abstract: MIPS R3000A PR3400
Contextual Info: PCBM/3400 [P ^ E L D ID M Â ^ Y -FEATURES: • ■ ■ ■ Printed circuit board module contains: - PR3400 integrated CPU and FPA - PR3100A PaceWrap Write/Read & Parity Buffer - 64 Kbytes of data cache

Contextual Info: PACEWRAP PR3100A WRITE/READ AND PARITY BUFFER [p[f3 E U UDINI M W FEATURES: Supports data writes while streaming • 8-word write buffer with byte-gathering capability ■ Read buffer with programmable depth of up to 32 words Bus snooper to assist in maintaining cache

PR2000

Abstract: PR3000A ha 1166 x R2000 mips processor
Contextual Info: PERFORMANCE SEMI CON DU CT OR SDE D 7 0 b 2 S lì 7 • 00D15S1 PERFORMANCE INTEGRATED MIPS MODULE PIMM" 713 «PSC PREILDOyDDNAIRV FEATURES: ■ Single VLSI muttichip module contains: • PR3000A CPU • PR3010A FPA • PR3100A Write/Read and Parity Buffer

Contextual Info: PaceMips1" PR3400 CPU 32-BIT RISC PROCESSOR WITH FLOATING POINT ACCELERATOR X r- FEATURES • CPU and FPA in a monolithic VLSI package ■ 32-BIT RISC Processor PaceMips PR3000A that contains thirty-two general purpose 32-bit

PR3000A

Contextual Info: PaceMips PR3400L CPU 32-BIT RISC PROCESSOR WITH FLOATING POINT ACCELERATOR X r- FEATURES registers to support single and double precision arithmetic. • Fully conforms to ANSI/IEEE Standard 7541985 "IE E E Standard for Binary Floating Point

53C700

Abstract: 53c70 PR3000A scsi manual
Contextual Info: PaceRunner/3400 MIPS RISC VMEbus SINGLE BOARD COMPUTER • 33MHz and 40MHz RISC PR3400 Integrated PR3000A CPU/PR3010A FPA Offer 28 and 32 VAXmips respectively 53C710 SCSI I/O processor with an on-chip 32-bit

PR2000

Abstract: PR3000A MIPS R3000A R2000 mips processor
Contextual Info: PERFORMANCE INTEGRATED MIPS MODULE PIMM” FEATURES: • • bus snooper to assist In maintaining cache coherency in multiprocessor systems Single VLSI multichip module contains: • PR3000A CPU • PR3010A FPA ■ P4C92815 x4 Bicameral SCRAM contains: • 32 KBytes each of address latched

PR3000A

Abstract: CPGA PR3000 PR3400 84 pin cpu PR2000 PR3010A
Contextual Info: PERFORMANCE SEMICONDUCTOR 50E D • TObES'i? QÜÜ13Ô7 0D7 «P S C 32- and 64-bit RISC MIPS Microprocessors PR2000A1 Sp eed M Hz 16 Pkg No. Code Pins C PGC 145 X Pkg Heat Type S lu g Cavity Part Type Use PR3000A for new designs CPGA No u G rad es 4 M A vail.

PR3000A

Abstract: CPGA PR2000
Contextual Info: PERFORMANCE SEMICONDUCTOR 50E D • TObES'i? QÜÜ13Ô7 0D7 «P S C 32- and 64-bit RISC MIPS Microprocessors PR2000A1 Sp eed M Hz 16 Pkg No. Code Pins C PGC 145 X Pkg Heat Type S lu g Cavity Part Type Use PR3000A for new designs CPGA No u G rad es 4 M A vail.

Contextual Info: PaceMips PR3400L CPU 32-BIT RISC PROCESSOR WITH FLOATING POINT ACCELERATOR FEATURES registers to su p p o rt sin gle and double pre cisio n arithm etic. • Fully co n fo rm s to ANSI/IEEE Standard 7541985 "IEEE Standard fo r Binary Floating Point A rith m e tic”

PR3400

Abstract: fpa g12 PR3000A tag 136 m2
Contextual Info: Pace Mips“PR3400 CPU 32-BIT RISC PROCESSOR WITH FLOATING POINT ACCELERATOR FEATURES • CPU and FPA in a monolithic VLSI package ■ 32-BIT RISC Processor PaceMlps PR3000A that contains thirty-two general purpose 32-blt registers ■ On-Chip Memory Management Unit provides fast