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Text: NB7L585 2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM Description The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select