MS007A Search Results

JH 8203

Abstract: MS007A lucent technologies W series
Contextual Info: jAu,V yT997Da,aShee' microelectronics group Lucent Technologies Bell Labs Innovations MS007A Power Module: 40 Vdc to 100 Vdc Input; +5 Vdc Output; 7.5 W Features • Small size: 51 mm x 28 mm x 12 mm 2.00 in. x 1.10 in. x 0.46 in. ■ Output current limiting: unlimited duration

MS007A

Contextual Info: Advance Data Sheet July 1997 microelectronics group Lucent Technologies Bell Labs Innovations MS007A Power Module: 40 Vdc to 100 Vdc Input; +5 Vdc Output; 7.5 W Features • Small size: 51 mm x 28 mm x 12 mm 2.00 in. x 1.10 in. x 0.46 in. ■ Output current limiting: unlimited duration

Contextual Info: BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches two sets of eight , CMOS.sontrol circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum flexibility. The driver includes thermal shutdown circuitry to protect

Contextual Info: BiMOS U DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches two sets of eight , CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum flexibility. The driver includes thermal shutdown circuitry to protect

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

sol18 package

Abstract: MS-012AA Package PLCC-44 SMD SOL18 64 CERAMIC LEADLESS CHIP CARRIER LCC MS 013AA sol 20 Package PLCC-20 SOL-18
Contextual Info: APPLICATIONS INFORMATION SURFACE-MOUNT IC PACKAGES Significant benefits can be achieved through the use of surfacemounted devices SMDs and general surface-mount technology as it applies to all components, both active and passive. The major benefits are reduced size and weight, and improved system reliability through

GP007

Abstract: UDN-2931B UDN2931W UDN2931B UDN2931EB UD1M2931W 3 phase brushless dc motor
Contextual Info: Integrated UDN2931B/EB/W Data Sheet 29318.12 c 3-CHADIIMEL HALF-BRIDGE MOTOR DRIVERS UDM2931W Developed for use in 3-phase brushless dc motor applications, the UDN2931B/EB/W provide drive capabilities to ± 2 A ± 3.5 A peak and 15 V. All devices provide for low output voltage drops at maximum rated

ULN3839A

Abstract: uln3840 ULN3859 ULN3859A ULN3840A ULN3883A Design and construction of FM radio uln3839 uln3834a ULN-3840A
Contextual Info: PRELIMINARY ISSUE Specifications Subject to Change W ithout Notice April 20,1989 ULN3800A ULN3800EP FM/FMX STEREO DECODERS * Noise-free FM-stereo reception, even of stereo stations that were previously too noisy to listen to without switching to mono, is provided by

gp007

Contextual Info: U D N 2931B / E B / W Data Sheet 29318.12 Integrated Circuits 3-CHANNEL HALF-BRIDGE MOTOR DRIVERS IDN2931W Developed for use in 3-phase brushless dc motor applications, the UDN2931B/EB/W provide drive capabilities to ± 2 A ± 3.5 A peak and 15 V. All devices provide for low output voltage drops at maximum rated

UCN5881EP

Abstract: GP-025-1A
Contextual Info: 5881 5881 Data Sheet 26180.16 BiMOS II DUAL 8-BIT LATCHED DRIVER BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches two sets of eight , CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum

UCN5881EP

Contextual Info: 5881 BiMOS U DXJAL 8-BIT LATCHED DRIVER WITH BEAD BACK With 16 CMOS data latches two sets of eight , CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum flexibility. The driver includes thermal shutdown circuitry to protect

UCN5881EP

Contextual Info: 5881 Data Sheet 26180.16 5881 BiMOS II DUAL 8-BIT LATCHED DRIVER BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches two sets of eight , CMOS control circuitry for each set of latches, and a bipolar saturated driver for each latch, the UCN5881EP provides low-power interface with maximum

UDN2916B

Abstract: PBL3717 UC3770 1803e UDN2916EB UDN2916 VM45 AF
Contextual Info: SPRAGUE/SEfllCOND GROUP 14E D 0513050 0004^10 2 • r-0 -/3 -a 5 * DUAL FULL-BRIDGE PWM MOTOR DRIVERS IECQM FG. APPROVAL UDN2916B The UDN2916B and UDN2916EB motor drivers are designed to drive both windings of a bipolar stepper motor or bidirectionally control

Contextual Info: C ircu its , BiMOS n 32 -BIT SERIAL-INPUT LATCHED SOURCE DRIVERS WITH ACTIVE DMOS PULL-DOWNS UCN5818EPF 3 1— w r- UJ< 0 3 U IL n . r 0 => u < r— 3 1/10 _! / _!</) 1/IÛ O I § UJ » !" 8 .3 19 2 8 3 ABSOLUTE MAXIMUM RATINGS at Ta = 25°C Logic Supply Voltage, V q o .15V

ULN3839A

Abstract: ULN3859A ULN3840A uln3859 ULN3834A uln3839 ULN3845A ULN3846A uln3840 uln3842
Contextual Info: ULN3800A ULN3800EP In te g r a te d C irc u its FM/FMX* STEREO DECODERS Noise-free FM -stereo reception, even of stereo stations that were previously too noisy to listen to without switching to mono, is provided by the U LN 3800A and U L N 3800E P F M /F M X stereo decoders. With a mini­

Contextual Info: ^ c te l -m Package Characteristics and Mechanical Drawings P a c k a g e T h e rm a l C h a ra c te ris tic s Package Type Plastic Leaded Chip Carrier PLCC Plastic Quad Flatpack (PQFP) Plastic Quad Flatpack (PQFP)

Contextual Info: , The UCN5812AF/EPF combine a 20-bit CMOS shift register, data latches, and control circuitry with high-voltage bipolar source drivers and DMOS active pull-downs. Design improvements include active DMOS pull-downs for reduced supply current requirements, and lower saturation

ULN8510

Abstract: PS-005
Contextual Info: PRELIMINARY ISSUE ULN8510A/EP/R ULN8511A/EP/R Specifications Subject to Change Without Notice October 26,1988 OCTAL LOW-SPEED EIA RECEIVERS ILN8510A/R Each containing eight differential line receivers, the ULN8510A/EP/R and ULN8511A/EP/R are designed for cost-effective data communica­

Contextual Info: UDN2547B IID1M2547EB PROTECTED QUAD POWER DRIVERS Providing interface betw een low -level signal processing circuits and pow er loads, the U D N 2 5 4 7 B and U D N 2 5 4 7 E B quad pow er drivers com ­ bine logic gates and high-current bipolar outputs with com plete output