MAPL128 Search Results

MAPL128 Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
MAPL128V		National Semiconductor	Multiple Array Programmable Logic		Scan	PDF

MAPL128 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
MAPL opal Abstract: gal programming algorithm MAPL128 MAPL128V t1146 fpla applications bit-slice Contextual Info: CHAPTER 1 M A PL128 D atash ee t PRELIMINARY MAPL128, MAPL144 . . Multiple Array Programmable Logic March 1991 General Description The MAPL128 and MAPL144 are available in 28-pin and 44-pin, PLCC packages respectively. These packages con form to the JEDEC standard power, ground and clock pin	OCR Scan	MAPL128 MAPL128, MAPL144 D4060 3-299-7W0 MAPL opal gal programming algorithm MAPL128V t1146 fpla applications bit-slice	PDF
mapl144 Contextual Info: MAPL128, MAPL144 Multiple Array Programmable Logic MAPL128/MAPL144 S3 National ÆM Semiconductor General Description The M APL128 and MAPL144 are the first in a series of new higher density, electrically erasable CM OS EECM O S pro grammable logic devices based on a proprietary National	OCR Scan	MAPL128/MAPL144 MAPL128, MAPL144 APL128 MAPL128/144	PDF
20l8b Abstract: opal C1995 MAPL opal 16L8-7 MAPL128 Contextual Info: National Semiconductor Application Note 838 David Hawley July 1992 This design uses two NSC MAPL128s and a PAL to implement the Futurebus a central arbitration protocol for 10 nodes In this application brief a schematic showing the full schematic EXCEPT for the BTL transceivers two timing diagrams and their source command stimulus files and the	Original	MAPL128s 20-3A 20l8b opal C1995 MAPL opal 16L8-7 MAPL128	PDF
Device-List Abstract: cf745 04 p 24LC211 lattice im4a3-32 CF775 MICROCHIP 29F008 im4a3-64 ks24c01 ep320ipc ALL-11P2 Contextual Info: Device List Adapter List Converter List for ALL-11 JUL. 2000 Introduction T he Device List lets you know exactly which devices the Universal Programmer currently supports. The Device List also lets you know which devices are supported directly by the standard DIP socket and which	Original	ALL-11 Z86E73 Z86E83 Z89371 ADP-Z89371/-PL Z8E000 ADP-Z8E001 Z8E001 Device-List cf745 04 p 24LC211 lattice im4a3-32 CF775 MICROCHIP 29F008 im4a3-64 ks24c01 ep320ipc ALL-11P2	PDF
gal programming timing chart Abstract: Futurebus NS32GX320 DP8421A AN-751 C1995 DS3875 DS3884 DS3885 FF000000 Contextual Info: IMPORTANT NOTE This design was based on a preliminary version December 1990 of the IEEE 896 1 and 896 2 specification and thus has some discrepancies with the actual standard specifications This application note is included to give a designer background information and design tips for Futurebus a boards	Original	20-3A gal programming timing chart Futurebus NS32GX320 DP8421A AN-751 C1995 DS3875 DS3884 DS3885 FF000000	PDF
22CV10AP Abstract: 22cv10 nte quick cross ict peel 18CV8J palce programmer schematic blackjack vhdl code PA7140J-20 INTEL PLD910 PALCE610 Contextual Info: Data Book General Information PEEL Arrays PEEL Devices Special Products and Services Development Tools Application Notes and Reports Package Information PLACE Users Manual_ Introduction to PLACE PLACE Installation Getting Started with PLACE Operation Reference Guide	OCR Scan		PDF
round robin bus arbitration Abstract: arbitration scheme ab-7 national FUTUREBUS 1 am6 74AS00 C1995 DS3875 DS3884A DS3885 Contextual Info: National Semiconductor Application Note 837 Shilpa Parikh July 1992 IEEE 896 1 Futurebus a Standard specifies two arbitration protocols Distributed Arbitration and Central Arbitration Each arbitration scheme has its merits and drawbacks First a brief summary of both arbitration methodologies is presented Then follows a discussion on National’s present day	Original		PDF