M74AS1008AP Search Results

UTP HA3

Contextual Info: MITSUBISHI -CDGTL L O G I C } 11 D È J 1=24102? Q0122fc>M 3 J ~ MITSUBISHI ASTTLs IVI7 4 A S 10 0 8 A P "7^ V 3 - / S _QUADRUPLE 2-INPUT POSITIVE AND DRIVER DESCRIPTION PIN CONFIGURATION TOP VIEW The M74AS1008AP is a semiconductor integrated circuit

Contextual Info: MITSUBISHI ASTTLs M 74AS1008AP QUADRUPLE 2-INPUT POSITIVE AND DRIVER DESCRIPTION PIN CONFIGURATION TOP VIEW The M 7 4A S 1 008 A P is a sem iconductor integrated circuit consisting of four 2-input positive-logic AND buffer gates, usable as n e g ative-log ic OR buffer gates.