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    LS109 Search Results

    LS109 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SNJ54LS109AJ Texas Instruments Dual J-K Positive-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125 Visit Texas Instruments Buy
    SN74ALS109AN Texas Instruments Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP 0 to 70 Visit Texas Instruments Buy
    SN74LS109ADR Texas Instruments Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Visit Texas Instruments
    SNJ54ALS109AJ Texas Instruments Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-CDIP -55 to 125 Visit Texas Instruments Buy
    SNJ54LS109AW Texas Instruments Dual J-K Positive-Edge-Triggered Flip-Flops With Preset And Clear 16-CFP -55 to 125 Visit Texas Instruments Buy
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    LS109 Price and Stock

    Rochester Electronics LLC SN74LS109ANSR

    SN74LS109A DUAL J-K POSITIVE-EDG
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SN74LS109ANSR Bulk 20,000 390
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    Rochester Electronics LLC SN74ALS109AN

    IC FF JK TYPE DUAL 1BIT 16DIP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SN74ALS109AN Bulk 16,292 289
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    Rochester Electronics LLC SN74LS109ANS

    J-KBAR FLIP-FLOP, LS SERIES, 2-F
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SN74LS109ANS Bulk 11,150 410
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    Rochester Electronics LLC SN74ALS109ADR

    IC FF JK TYPE DUAL 1BIT 16SOIC
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    DigiKey SN74ALS109ADR Bulk 10,000 666
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    Rochester Electronics LLC DM74ALS109AMX

    IC FF JK TYPE DUAL 1BIT 16SOIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey DM74ALS109AMX Bulk 7,500 1,902
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    Find more LS109 price and stock on Findchips.com

    LS109 Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    LS109 Unknown Dual J-K Positive Edge Triggered Flip-Flop Scan PDF

    LS109 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    SN54ALS109

    Abstract: No abstract text available
    Text: TYPES LS109, SN54AS109, LS109, SN74AS109 DUAL J K POSITIVE EDGE TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 0 2 6 6 1 , A P R IL 1 9 8 2 — R E V IS E D D E C E M B E R 1 9 8 3 • Package Options Include Both Plastic and Ceramic SN 54A LS109. S N 54A S 109 • . . J PACKAGE


    OCR Scan     		SN54ALS109, SN54AS109, SN74ALS109, SN74AS109 LS109. LS109, ALS109 SN54ALS109 PDF

    MC74HC109N

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C74HC109 Dual J -K Flip-Flop w ith Set and Reset High-Performance Silicon-Gate CMOS N SUFFIX PLASTIC PACKAGE CASE 648-08 The MC74HC109 is identical in pinout to the LS109. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are


    OCR Scan     		MC74HC109 LS109. DL129 MC74HC109 MC74HC109N PDF

    LS74

    Abstract: 54LS109 LS109 4 jn
    Text: MICROCIRCUIT DATA SHEET Original Creation Date: 04/24/98 Last Update Date: 09/14/98 Last Major Revision Date: 07/07/98 LS109-X REV 1A0 DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP General Description The 'LS109 consists of two high-speed, completely independent transition clocked


    Original     		MNDM54LS109-X LS109 54LS109 DM54LS109J/883 DM54LS109W/883 MIL-STD-883, M0002951 54LS109 LS74 4 jn PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC74HC109 Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The MC74HC109 is identical in pinout to the LS109. The device inputs are com patible with standard CMOS outputs; with pullup resistors, they are


    OCR Scan     		MC74HC109 MC74HC109 LS109. MC74HC109/D PDF

    Untitled

    Abstract: No abstract text available
    Text: LS109A National Semiconductor LS109/LS109A/DM74LSJ09A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		54LS109/DM54LS109A/DM74LSJ09A PDF

    ls109

    Abstract: No abstract text available
    Text: LS109 Dual J-K Positive-Edge-Triggered Flip-Flop CLR1 [ T The LS109 is a bipolar, NPN, sealed-junction, silicon integrated circuit. It is manufactured in lowpower Schottky technology and is available in a wire-bonded, 16-pin plastic DIP or surface mount


    OCR Scan     		LS109 16-pin PDF

    TTL 74109

    Abstract: PIN CONFIGURATION 74109 853051 8530510 74LS109A
    Text: 74109, LS109A Signetics Flip-Flops Dual J-K Positive Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION The '109 is dual positive edge-triggered JK-type flip-flop featuring individual J, K, Clock, Set and Reset inputs; also com­ plementary Q and 5 outputs.


    OCR Scan     		LS109A 1N916, 1N3064, 500ns 500ns TTL 74109 PIN CONFIGURATION 74109 853051 8530510 74LS109A PDF

    SN54ALS109A

    Abstract: SN54AS109 SN74ALS109A
    Text: SN 54A LS109A , SN 54A S109i_SN 74A LS109A . SN 74A S109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP FLOPS WITH CLEAR AND P R ESET D 2 6 6 1 . A P R IL 1 9 8 2 - SN 54A LS109A , SN 54A S109 . . . J PACKAG E S N 7 4 A L S 1 0 9 A . S N 7 4 A S 1 0 9 . . D OR N P A C K A G E


    OCR Scan     		SN54ALS109A, SN54AS109i SN74ALS109A, SN74AS109 D2661. 300-mil ALS109A AS109 SIM54ALS109A, SN54AS109 SN54ALS109A SN74ALS109A PDF

    Untitled

    Abstract: No abstract text available
    Text: blE J> MOTOROLA SC LOGIC MOTOROLA b3b72SS OCHlTBb T33 inom • SEMICONDUCTOR TECHNICAL DATA MC54/74HC109 Dual J-K Flip-Flop w ith Set and Reset J SUFFIX CERAMIC CASE 620-09 High-Performance Silicon-Gate CMOS T he MC54/74HC109 is id en tic a l in p in o u t to th e LS109. T he device in p u ts are


    OCR Scan     		b3b72SS MC54/74HC109 MC54/74HC109 LS109. 54/74H PDF

    LS109

    Abstract: No abstract text available
    Text: LS109 Dual J-K Positive-Edge-Triggered Flip-Flop DESCRIPTION LOGIC DIAGRAM V2 This monolithic dual J-K edge-triggered flip-flop features individual J, K, clock, preset, and clear inputs. A low level at preset or clear sets or resets the outputs regardless of the


    OCR Scan     		LS109 page2-174) LS109 PDF

    LS109

    Abstract: WP90224L13 WP91398L4
    Text: LS109 Dual J-K Positive-Edge-Triggered Flip-Flo p CLR1 [ T T h e LS109 is a bipolar, N P N , sealed-junction, silic o n integrated circuit. It is m anufactured in lowpower S cho ttky te ch n o lo g y an d is availab le in a w ire-bonded, 16-pin pla stic D IP or su rfa ce m ount


    OCR Scan     		LS109 LS109 16-pin WP90224L13 WP91398L4 PDF

    CXXXN

    Abstract: No abstract text available
    Text: MOTOROLA SC -CLOGIC} 02 b3b72Sa 0000170 5 ~T-4:b-07 -ü -7 MOTOROLA S E M IC O N D U C T O R TECHNICAL DATA MC54/74HC109 D ual J -K Flip-Flop w ith S e t and Reset J SUFFIX CERAM IC CA SE 620-09 High-Performance Silicon-Gate C M O S ' The M C 54/74H C 109 is identical in pinout to the LS109. The device inputs are


    OCR Scan     		b3b72Sa MC54/74HC109 54/74H LS109. CHC109 CXXXN PDF

    TTL 74109

    Abstract: 8530510 74109 PIN CONFIGURATION 74109
    Text: 74109, LS109A Signetics Flip-Flops Dual J-K Positive Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION T h e '1 0 9 is dual positive edge-triggered JK-type flip-flop featuring individual J, K, Clock, S e t and R eset inputs; also com ­


    OCR Scan     		LS109A 74LS109A 33MHz 33MHz 70PULSE 500ns 500ns 1N916, 1N3064, TTL 74109 8530510 74109 PIN CONFIGURATION 74109 PDF

    54LS109

    Abstract: 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AN J16A M16A LS109 DM74LS109
    Text: LS109A National Semiconductor LS109/LS109A/LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		54LS109/DM54LS109A/DM74LS109A 54LS109 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AN J16A M16A LS109 DM74LS109 PDF

    ic 74109

    Abstract: TTL 74109 PIN CONFIGURATION 74109 8 pin dip j k flipflop ic
    Text: 74109 , LS109 A Signetics Flip-Flops Dual J-K Positive Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION TYPE The '109 is dual positive edge-triggered JK-type flip-flop featuring individual J, K, Clock, Set and Reset inputs; also com ­


    OCR Scan     		LS109 74LS109A 33MHz 33MHz N74109ll 500ns 500ns ic 74109 TTL 74109 PIN CONFIGURATION 74109 8 pin dip j k flipflop ic PDF

    DL129

    Abstract: LS109 MC74HC109 MC74HCXXXD MC74HCXXXN
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC74HC109 Dual J-K Flip-Flop with Set and Reset High–Performance Silicon–Gate CMOS The MC74HC109 is identical in pinout to the LS109. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are


    Original     		MC74HC109 MC74HC109 LS109. DL129 MC74HC109/D* MC74HC109/D LS109 MC74HCXXXD MC74HCXXXN PDF

    relay driver Circuit diagram

    Abstract: ttl relay driver circuits quad relay driver relay driver "relay driver" LS1098AAF
    Text: LS1098AAF QUAD NEGATIVE-VOLTAGE RELAY DRIVER PRELIMINARY Description THE LS1098AAF integrated circuit consists of four independent 60 V relay drivers designed to operate over wide ranges of supply voltage, common-mode voltage, and ambient temperature, with 50 mA source capability. These drivers are


    OCR Scan     		LS1098AAF LS1098AAF relay driver Circuit diagram ttl relay driver circuits quad relay driver relay driver "relay driver" PDF

    LS109

    Abstract: No abstract text available
    Text: LS109 V Dual J-K Positive-Edge-Triggered Flip-Flop J C LR1 [_1_ The LS109 is a bipolar, NPN, sealed-junction, silicon integrated circuit. It is manufactured in lowpower Schottky technology and is available in a wire-bonded, 16-pin plastic DIP or surface mount


    OCR Scan     		LS109 LS109 16-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC109 Dual J-K Flip-Flop with Set and Reset J SUFFIX CERAMIC CASE 620-09 High-Performance Silicon-Gate CMOS T he M C 54/74H C 10 9 is iden tical in p in o u t to th e LS109. The device in p u ts are N SUFFIX PLASTIC


    OCR Scan     		MC54/74HC109 54/74H LS109. PDF

    pin diagram of 74109

    Abstract: 74109 74109 dual JK PIN CONFIGURATION 74109 TTL 74109 1N3064 1N916 74LS 74LS109 74LS109A
    Text: 74109, LS109A Signetics Flip-Flops Dual J-K Positive Edge-Triggered Flip-Flop Product Specification Logic Products TYPICAL f MAX TYPICAL SUPPLY CURRENT TOTAL 74109 33MHz 9mA LS109A 33MHz 4mA DESCRIPTION The '109 is dual positive edge-triggered JK-type flip-flop featuring individual J, K,


    OCR Scan     		LS109A 1N916, 1N3064, 500ns pin diagram of 74109 74109 74109 dual JK PIN CONFIGURATION 74109 TTL 74109 1N3064 1N916 74LS 74LS109 74LS109A PDF

    74HC4096

    Abstract: EQUIVALENT TIMER IC WITH CD 4060 rs flip-flop IC 7400 C4050A shiftregister PIPO C148A LS 7476 L1AA C4051A LS294
    Text: Selection Guide C2MOS Logic TC74HC/HCT Series 2. High Speed CMOS Selection Guide GATE NAND HCOOA NOR AND OR INVERTER, BUFFER EXCLUSIVE OR/NOR SC HM ITT TRIGGER HC02A HC08A H C31A H C04A H C86A H C14A H C51A H C4049A M ULTI FUNCTION LEVEL SHIFTER HCTOOA HCT02A


    OCR Scan     		TC74HC/HCT HC02A HC08A C4049A HC125A HCT244A HC541A HC242A CT640A HC652A 74HC4096 EQUIVALENT TIMER IC WITH CD 4060 rs flip-flop IC 7400 C4050A shiftregister PIPO C148A LS 7476 L1AA C4051A LS294 PDF

    LS109A

    Abstract: No abstract text available
    Text: AVG Semiconductors DDi Technical Data 109 A Dual JK Positive Edge-Triggered Flip-Flops LS109A LS109A This device is_a dual edge-triggered flip-flop. Each flip-flop has individual J, K, clock, reset and preset inputs, and also com­ plementary Q and Q outputs.


    OCR Scan     		DV74LS109A DV74ALS109A DV74LS109A, 1-800-AVG-SEMI LS109A LS109A PDF

    c4554

    Abstract: C4581 c4072 C4549 C4015 c4632 C4510 C4014 c4582 C4063
    Text: LC9100, 92000 Series No.2723A J SA\YO A k O verview The LC9100, 92000 series are semicustom LSIs especially suited to <Jéyéìop l h ^ s e r ^ q u e s t é ^ l .S l in a short period of time and at a low cost. The LC9100, 92000 series provide 17 types of m aster chip having


    OCR Scan     		LC9100, but220 TTL74 CMOS4000r LC9100 lot-12mA c4554 C4581 c4072 C4549 C4015 c4632 C4510 C4014 c4582 C4063 PDF

    SN74109

    Abstract: LS109A SN54109 SN54LS109A SN74 SN74LS109A rv101
    Text: SN54109, LS109A, SN74109, LS109A d u a l j k p o sitiv e e d ge -trigge re d flip -flo p s w ith p re se t and c le a r s d l s 037 DECEMBER 1 9 8 3 - • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic


    OCR Scan     		sn54109, sn54ls109a, sn74109, sn74ls109a sdls037 SN74109 LS109A SN54109 SN54LS109A SN74 SN74LS109A rv101 PDF