fifo asynch
Abstract: No abstract text available
Text: MEMORIES FIFO Memories and Shared Port RAMs ★ Under development Type Capacity Configuration Model No. Operating frequency MHz LH540203 Deeper Asynch. 18k 2k x 9 LH540203A LH540204 36k 4k x 9 FIFO LH540204A 72k 8k x 9 LH540205 Cycle time(ns) 18 Capacity
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LH540203
LH540203A
LH540204
LH540204A
LH540205
fifo asynch
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IR2E27A
Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
Text: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080
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Core28
IR2C24A/AN
IR2C26
IR2C30/N
IR2C32
IR2C33
IR2C34
IR2C36
IR2C38/N
IR2C43
IR2E27A
IR2C53
IR2E02
IR2E27
IR2E10
IR3N34
IR2E31A
IR2E01
IR2C07
ir2e31
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ak25
Abstract: 20U20
Text: MEMORIES FIFO Memories Caoaritv uapacny !Confi Jration «ordsxbits 64 x 8 0.5k 64 x 9 Model No. Supply current Operating Access time Cycle time fWjuancy (ns) MAX. (ns) MIN. Operating Standby (MHz) MAX. (mA) MAX. (mA) MAX. LH5481D/U-25 25 - 45 - LH5481D/U-35
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LH5481D/U-25
LH5481D/U-35
LH5491D/U-25
LH5491D/U-35
LH5496/D/U-20
LH5496/D/U-35
LHS496/D/U-50
LH540201AD/AN/AK/AU-10
LH590436M-20
LH59043-6M-25
ak25
20U20
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Untitled
Abstract: No abstract text available
Text: LH540203 CMOS 2048 X 9 Asynchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Access Times: 15/20/25/35/50 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing
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LH540203
LH540203
32-pin,
450-mil
28-pin,
300-mil
DIP28-W-300)
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