LH532000B Search Results

48-PIN

Abstract: A12C A15C LH532000B-1
Contextual Info: LH532000B-1 FEATURES CMOS 2M 256K x 8/128K x 16 M a sk-P ro g ra m m a b le ROM PIN CONNECTIONS • 262,144 words x 8 bit organization (Byte mode) 131,072 words x 16 bit organization (Word mode) 40-PIN DIP 40-PIN SOP TOP VIEW f . 1• 2 a 7[= O E i/Ô Ë ^D C C

48-PIN

Abstract: A10C A12C A15C LH532000B
Contextual Info: LH532000B FEATURES CMOS 2M 256K x 8/128K x 16 M ask-Program m able ROM PIN CONNECTIONS • 262,144 words x 8 bit organization (Byte mode) 131,072 words x 16 bit organization (Word mode) 40-PIN DIP 40-PIN SOP TOP VI EW f 1• \ 40 ZI Ag a 7C 2 39 U Ag AgiZ

LH532

Contextual Info: PRELIMINARY LH532000B-S FEATURES • Low-power supply: 2.6 to 5.5 V • 262,144 x 8 bit organization Byte mode 131,072 x 16 bit organization (Word mode) • Access time: 500 ns (MAX.) at 2.6 V < Vcc < 4.5 V 150 ns (MAX.) at 4.5 V < V cc < 5.5 V • Static operation

sharp mask rom 44-pin

Contextual Info: LH532000B FEATURES • Selectable memory organization: 262,144 x 8 bit byte mode 131,072 x 16 bit (word mode) • BYTE input pin selects bit configuration • Access time: 120/150 ns (MAX.) • CMOS 2M (256K x 8 / 128K x 16) Mask-Programmable ROM DESCRIPTION

48-PIN

Abstract: LH532000B-1
Contextual Info: LH532000B-1 FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words × 16 bit organization (Word mode) • Access time: 120 ns (MAX.) • Power consumption: Operating: 275 mW (MAX.) Standby: 550 µW (MAX.) • Mask-programmable control pin

Contextual Info: LH532000B-S FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access times: 500 ns (MAX.) at 2.6 V < Vcc < 4.5 V 150 ns (MAX.) at 4.5 V < Vcc < 5.5 V

Contextual Info: LH532000B-1 FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words x 16 bit organization (Word mode) • Access time: 120 ns (MAX.) • Power consumption: Operating: 275 mW (MAX.) Standby: 550 (iW (MAX.) • Mask-programmable control pin

Contextual Info: LH532000B FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access times: 120/150 ns (MAX.) • Low-power consumption: Operating: 275 mW (MAX.) Standby: 550 |iW (MAX.)

Contextual Info: LH532000B FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access times: 120/150 ns (MAX.) • Low-power consumption: Operating: 275 mW (MAX.) Standby: 550 (iW (MAX.)

ICE ICC3

Contextual Info: LH532000B FEATURES • Selectable memory organization: 26 2 ,1 4 4 x 8 bit byte mode 131,072 x 16 bit (word mode) • B YTE input pin selects bit configuration • Access time: 1 20/150 ns (M AX.) • Low-power consumption: CMOS 2M (256K x 8 / 128K x 16)

L239D

Contextual Info: LH532000B-S FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words x 16 bit organization (Word mode) CMOS 2M (256K x 8/128K x 16) 3 V-Drive Mask-Programmable ROM PIN CONNECTIONS 4 0 - P IN D IP T O P V IE W 4 0 - P IN S O P f • Access times:

48-PIN

Abstract: LH532000B
Contextual Info: LH532000B FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words × 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access times: 120/150 ns (MAX.) • Low-power consumption: Operating: 275 mW (MAX.) Standby: 550 µW (MAX.)

4039A

Abstract: LH532000BD-S
Contextual Info: LH532000B-S FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access times: 500 ns (MAX.) at 2.6 V < Vcc < 4.5 V 150 ns (MAX.) at 4.5 V < Vcc < 5.5 V

27E-14

Contextual Info: LH532000B CMOS 2M 256K x 8/128K x 16 MROM FEATURES PIN CONNECTIONS • 262,144 words x 8 bit organization (Byte mode) 131,072 words x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access times: 120/150 ns (MAX.) 40 -P IN D IP

sharp mask rom 44-pin

Contextual Info: LH532000B FEATURES • Selectable memory organization: 262,144 x 8 bit byte mode 131,072 x 16 bit (word mode) • BYTE input pin selects bit configuration • Access time: 120/150 ns (MAX.) • Low-power consumption: Operating: 275 mW (MAX.) Standby: 550 jiW (MAX.)

Contextual Info: PRELIMINARY LH532000B-S FEATURES • Low-power supply: 2.6 to 5.5 V CMOS 2M 256K x 8/128K x 16 3 V-Prive Mask-Program m able ROM • Packages: 40-pin, 600-mil DIP 40-pin, 525-mil SOP 44-pin, 1 0 x 1 0 mm2 QFP 44-pin, 14 x 14 mm2 QFP 48-pin, 1 2 x 1 8 mm2 TSOP (Type I)

C2438

Contextual Info: LH532000B-S CM OS 2M 256K x 8/128K x 16 3 V-Drive Mask-Programmable ROM FEATURES PIN CONNECTIONS • 262,144 words x 8 bit organization (Byte mode) 131,072 words x 16 bit organization (Word mode) 40-PIN DIP 40-PIN SO P TO P VIEW • BYTE input pin selects bit configuration

48-PIN

Abstract: LH532000B
Contextual Info: LH532000B CMOS 2M 256K x 8/128K × 16 MROM FEATURES PIN CONNECTIONS • 262,144 words × 8 bit organization (Byte mode) 131,072 words × 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access times: 120/150 ns (MAX.) • Low-power consumption:

LH532000B-1

Abstract: 48-PIN
Contextual Info: LH532000B-1 CMOS 2M 256K x 8/128K × 16 MROM FEATURES PIN CONNECTIONS • 262,144 words × 8 bit organization (Byte mode) 131,072 words × 16 bit organization (Word mode) • Access time: 120 ns (MAX.) • Power consumption: Operating: 275 mW (MAX.) Standby: 550 µW (MAX.)

48-PIN

Abstract: DSA0078634 LH532000BD-S
Contextual Info: LH532000B-S FEATURES • 262,144 words x 8 bit organization Byte mode 131,072 words × 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access times: 500 ns (MAX.) at 2.6 V ≤ VCC < 4.5 V 150 ns (MAX.) at 4.5 V ≤ VCC ≤ 5.5 V

6a123

Contextual Info: LH532000B-1 CMOS 2M 256K x 8/128K x 16 MROM FEATURES PIN CONNECTIONS • 262,144 words x 8 bit organization (Byte mode) 131,072 words x 16 bit organization (Word mode) • Access time: 120 ns (MAX.) • Power consumption: Operating: 275 mW (MAX.) Standby: 550 \i\N (MAX.)

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

lh57257

Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
Contextual Info: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429

LH231G

Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200