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    HD74ALV Price and Stock

    Texas Instruments SN74AVC16T245DGGR

    Translation - Voltage Levels 16-Bit Dual Supply Bus Transceiver
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    Mouser Electronics SN74AVC16T245DGGR 4,066
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    • 10 $1.28
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    • 1000 $0.997
    • 10000 $0.97
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    Texas Instruments SN74ALVC16334DGGR

    Universal Bus Functions 16bit Univ Bus
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    Mouser Electronics SN74ALVC16334DGGR 1,615
    • 1 $1.73
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    Texas Instruments SN74ALVCH16821DGGR

    Flip Flops 3.3V 20bit Bus
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    Mouser Electronics SN74ALVCH16821DGGR
    • 1 $4.2
    • 10 $4.2
    • 100 $4.05
    • 1000 $3.77
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    Texas Instruments SN74ALVCH16820DGGR

    Flip Flops 3.3V 10bit
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    Mouser Electronics SN74ALVCH16820DGGR
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    Texas Instruments SN74ALVCHS162830GR

    Buffers & Line Drivers 1Bit To 2Bit Add Drv With 3-State Outputs
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    HD74ALV Datasheets (354)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    HD74ALVC162244 Hitachi Semiconductor 16-bit Buffer-Driver with 3-state Outputs Original PDF
    HD74ALVC162244T Renesas Technology Buffer/Line Driver, Non-Inverting, 16 Channel, CMOS, 3-State, 48-TSSOP Original PDF
    HD74ALVC162334 Hitachi Semiconductor 16-bit Universal Bus Driver with 3-state Outputs Original PDF
    HD74ALVC162334T Hitachi Semiconductor Latch, D-Type, Transparent, 16-Channel, 3-State, 48-TSSOP Original PDF
    HD74ALVC162334TTP-48DC Hitachi Semiconductor Original PDF
    HD74ALVC16244 Hitachi Semiconductor 16-bit Buffer-Driver with 3-state Outputs Original PDF
    HD74ALVC16244T Hitachi Semiconductor Buffer/Line Driver, Non-Inverting, 16 Channel, CMOS, 3-State, 48-TSSOP Original PDF
    HD74ALVC16244TTP-48DC Hitachi Semiconductor Original PDF
    HD74ALVC162830 Renesas Technology 1-bit to 2-bit Address Driver with 3-state Outputs Original PDF
    HD74ALVC162831 Renesas Technology 1-bit 4-bit Address Register / Driver with 3-state Outputs Original PDF
    HD74ALVC162834 Hitachi Semiconductor ALVC162835 with inverted LE Original PDF
    HD74ALVC162834 Renesas Technology 18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable Original PDF
    HD74ALVC162834A Hitachi Semiconductor Logic ICS, 18 Bit Universal Bus Driver With 3 State Outputs And Inverted Latch Enable Original PDF
    HD74ALVC162834A Hitachi Semiconductor ALVC162835A with inverted LE for PC133 Original PDF
    HD74ALVC162834AN Hitachi Semiconductor Logic ICs, 18-Bit Universal Bus Driver With 3 State Outputs And Inverted Latch Enable Original PDF
    HD74ALVC162834AT Hitachi Semiconductor Latch, D-Type, Transparent, 18-Channel, 3-State, 56-TSSOP Original PDF
    HD74ALVC162834ATEL Hitachi Semiconductor Logic ICs, Register with Inverted LE Original PDF
    HD74ALVC162834T Hitachi Semiconductor Latch, D-Type, Transparent, 18-Channel, 3-State, 56-TSSOP Original PDF
    HD74ALVC162835 Hitachi Semiconductor 18-bit Universal Bus Driver with 3-state Outputs Original PDF
    HD74ALVC162835 Renesas Technology 18-bit Universal Bus Driver with 3-state Outputs Original PDF
    ...

    HD74ALV Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Hitachi DSA0095

    Abstract: 1B10 1B12 HD74ALVCH16269
    Text: HD74ALVCH16269 12-bit to 24-bit Registered Bus Transceivers with 3-state Outputs ADE-205-136 Z Preliminary 1st. Edition May 1996 Description The HD74ALVCH16269 is used in applications where two separate ports must be multiplexed onto, or demultiplexed from, a single port. The device is particularly suitable as an interface between


    Original     		PDF HD74ALVCH16269 12-bit 24-bit ADE-205-136 HD74ALVCH16269 Hitachi DSA0095 1B10 1B12

    Hitachi DSA00104

    Abstract: HD74ALVC162831
    Text: HD74ALVC162831 1-bit 4-bit Address Register / Driver with 3-state Outputs ADE-205-200 Z Preliminary 1st. Edition November 1997 Description This 1-bit to 4-bit address register / driver is designed for 2.3 V to 3.6 V VCC operation. The device is ideal for use in applications in which a single address bus is driving four separate memory locations. The


    Original     		PDF HD74ALVC162831 ADE-205-200 HD74ALVC162831 D-85622 Hitachi DSA00104

    2Y16

    Abstract: 1y14 Hitachi DSA00104 HD74ALVC16830 2Y14
    Text: HD74ALVC16830 1-bit to 2-bit Address Driver with 3-state Outputs ADE-205-198 Z Preliminary 1st. Edition November 1997 Description This 1-bit to 2-bit address driver is designed for 2.3 V to 3.6 V VCC operation. To ensure the high impedance state during power up or power down, the output ebable ( ) input should be tied to VCC


    Original     		PDF HD74ALVC16830 ADE-205-198 D-85622 2Y16 1y14 Hitachi DSA00104 HD74ALVC16830 2Y14

    Hitachi DSA0098

    Abstract: 1B10 1B12 HD74ALVCHR162269
    Text: HD74ALVCHR162269 12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs ADE-205-190 Z Preliminary, 1st. Edition February 1997 Description The HD74ALVCHR162269 is a 12-bit to 24-bit registered bus exchanger, which is intended for applications where two separate ports must be multiplexed onto, or demultiplexed from, a single port. It is


    Original     		PDF HD74ALVCHR162269 12-bit 24-bit ADE-205-190 HD74ALVCHR162269 sequ2000 D-85622 Hitachi DSA0098 1B10 1B12

    Hitachi DSA0095

    Abstract: HD74ALVCH16501
    Text: HD74ALVCH16501 18-bit Universal Bus Transceivers with 3-state Outputs ADE-205-168A Z 2nd. Edition December 1999 Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the


    Original     		PDF HD74ALVCH16501 18-bit ADE-205-168A Hitachi DSA0095 HD74ALVCH16501

    HD74ALVCF162835

    Abstract: Hitachi DSA00115
    Text: HD74ALVCF162835 18-bit Universal Bus Driver with 3-state Outputs ADE-205-227E Z Preliminary, 6th. Edition Feb. 1, 1999 Description The HD74ALVCF162835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode


    Original     		PDF HD74ALVCF162835 18-bit ADE-205-227E HD74ALVCF162835 Hitachi DSA00115

    HD74ALVCH16836

    Abstract: Hitachi DSA00115
    Text: HD74ALVCH16836 20-bit Universal Bus Driver with 3-state Outputs ADE-205-213 Z Preliminary, 1st. Edition January 1998 Description This 20-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by the output enable (O E) input. The device operates in the


    Original     		PDF HD74ALVCH16836 20-bit ADE-205-213 mini97 D-85622 HD74ALVCH16836 Hitachi DSA00115

    1B12

    Abstract: HD74ALVCH16260 DSA003634
    Text: HD74ALVCH16260 12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs ADE-205-135B Z 3rd. Edition December 1999 Description The HD74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical


    Original     		PDF HD74ALVCH16260 12-bit 24-bit ADE-205-135B HD74ALVCH16260 A1-A12, 1B1-1B12, 1B12 DSA003634

    HD74ALVC1G00

    Abstract: DSA003635
    Text: HD74ALVC1G00 2–input NAND Gate ADE-205-604C Z Rev.3 Aug. 2001 Description The HD74ALVC1G00 has two–input NAND gate in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power


    Original     		PDF HD74ALVC1G00 ADE-205-604C HD74ALVC1G00 DSA003635

    HD74ALVCH162831

    Abstract: DSA003634
    Text: HD74ALVCH162831 1-bit 4-bit Address Register / Driver with 3-state Outputs ADE-205-195 Z Preliminary 1st. Edition March 1998 Description This 1-bit to 4-bit address register / driver is designed for 2.3 V to 3.6 V VCC operation. The device is ideal for use in applications in which a single address bus is driving four separate memory locations. The


    Original     		PDF HD74ALVCH162831 ADE-205-195 HD74ALVCH162831 DSA003634

    HD74ALVC2G06

    Abstract: DSA003635
    Text: HD74ALVC2G06 Triple Inverter Buffers / Drivers with Open Drain ADE-205-632A Z Rev. 1 August. 2001 Description The HD74ALVC2G06 has triple inverter buffers / drivers with open drain outputs in a 8 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers),


    Original     		PDF HD74ALVC2G06 ADE-205-632A HD74ALVC2G06 DSA003635

    HD74ALVCH16374

    Abstract: DSA003634
    Text: HD74ALVCH16374 16-bit D-type Flip Flops with 3-state Outputs ADE-205-123B Z 3rd. Edition December 1999 Description The HD74ALVCH16374 has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive


    Original     		PDF HD74ALVCH16374 16-bit ADE-205-123B HD74ALVCH16374 DSA003634

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVC16834 18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable HITACHI ADE-205-216C Z Preliminary, 4th. Edition Jan. 1, 1999 Description The HD74ALVC16834 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V Vcc operation.


    OCR Scan     		PDF 18-bit ADE-205-216C HD74ALVC16834 40815HITEC

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH162500 18-bit Universal Bus Transceivers with 3-state Outputs HITACHI ADE-205-181 Z Preliminary, 1st. Edition December 1996 Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the


    OCR Scan     		PDF HD74ALVCH162500 18-bit ADE-205-181 HD74ALV CH162500 TTP-56D

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16721 3.3-V 20-bit Flip Flops with 3-state Outputs HITACHI ADE-205-139 Z Preliminary 1st. Edition May 1996 Description The HD74ALVCH1672rs twenty flip flops are edge triggered D-type flip flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs,


    OCR Scan     		PDF HD74ALVCH16721 20-bit ADE-205-139 HD74ALVCH1672rs HD74ALV CH16721 TTP-56D

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16373 16-bit Transparent D-type Latches with 3-state Outputs HITACHI ADE-205-138 Z Preliminary 1st. Edition May 1996 Description The HD74ALVCH16373 is particularly suitable for implementing buffer registers, I/O ports, bi-directional bus drivers, and working registers. It can be used as two 8-bit latches or one 16-bit latch. When the latch


    OCR Scan     		PDF HD74ALVCH16373 16-bit ADE-205-138 HD74ALVCH16373 HD74ALV CH16373 TTP-48DC

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16827 20-bit Buffers / Drivers with 3-state Outputs HITACHI ADE-205-140A Z 2nd. Edition September 1997 Description The HD74ALVCH16827 is composed of two 10-bit sections with separated output enable signals. For either 10-bit buffer section, the two output enable (lO E l and 10E 2 or 20E 1 and 20E 2) inputs must both


    OCR Scan     		PDF HD74ALVCH16827 20-bit ADE-205-140A HD74ALVCH16827 10-bit D-85622

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16721 3.3-V 20-bit Flip Flops with 3-state Outputs HITACHI ADE-205-139A Z 2nd. Edition September 1997 Description The HD74ALVCH16721’s twenty flip flops are edge triggered D-type flip flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q


    OCR Scan     		PDF HD74ALVCH16721 20-bit ADE-205-139A HD74ALVCH16721â capa2000 D-85622

    Untitled

    Abstract: No abstract text available
    Text: HD74ALV CH162373 16-bit Transparent D-type Latches with 3-state Outputs HITACHI ADE-205-179 Z Preliminary, 1st. Edition December 1996 Description The HD74ALVCH162373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit latches or one 16-bit latch. When the latch


    OCR Scan     		PDF HD74ALV CH162373 16-bit ADE-205-179 HD74ALVCH162373 TTP-48DC

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16374 16-bit D-type Flip Flops with 3-state Outputs HITACHI A D E - 2 0 5 - 1 2 3 Z Preliminary, Rev.O October 1995 Description The HD74ALVCH16374 has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive


    OCR Scan     		PDF HD74ALVCH16374 16-bit HD74ALVCH16374 HD74ALV CH16374

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16260 12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs HITACHI ADE-205-135A Z 2nd. Edition September 1997 Description The HD74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical


    OCR Scan     		PDF HD74ALVCH16260 12-bit 24-bit ADE-205-135A HD74ALVCH16260 A1-A12, 1B1-1B12,

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH162721 3.3-V 20-bit Flip Flops with 3-state Outputs HITACHI ADE-205-184A Z 2nd. Edition September 1997 Description The HD74ALVCH16272rs twenty flip flops are edge triggered D-type flip flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs,


    OCR Scan     		PDF HD74ALVCH162721 20-bit ADE-205-184A HD74ALVCH16272rs HD74AL CH162721 TTP-56D

    sfl28

    Abstract: No abstract text available
    Text: HD74ALVCH16269 12-bit to 24-bit Registered Bus Transceivers with 3-state Outputs HITACHI ADE-205-136 Z Preliminary 1st. Edition May 1996 Description The HD74ALVCH16269 is used in applications where two separate ports must be multiplexed onto, or demultiplexed from, a single port. The device is particularly suitable as an interface between synchronous


    OCR Scan     		PDF HD74ALVCH16269 12-bit 24-bit ADE-205-136 HD74ALVCH16269 HD74ALV CH16269 TTP-56D sfl28

    2Y16

    Abstract: No abstract text available
    Text: HD74ALVC16830 1-bit to 2-bit Address Driver with 3-state Outputs HITACHI ADE-205-198 Z Preliminary 1st. Edition November 1997 Description This 1-bit to 2-bit address driver is designed for 2.3 V to 3.6 V V cc operation. To ensure the high impedance state during power up or power down, the output ebable (OE) input should be tied to V cc


    OCR Scan     		PDF HD74ALVC16830 ADE-205-198 D-85622 2Y16