DP50CM232 Search Results

3QA18

Abstract: 3UA18
Contextual Info: 256Kx8 ROM/32Kx8 SRAM Combo Memory DP50CM232-E M í C \i O S Y S T E M S DESCRIPTION: The DP50CM232-E is a combination memory chip consist of 2M-bit Read Only Memory organized as 256K words by 8 bits and a 256K-bit Static Random Access Memory organized as 32K words by 8 bits.

Contextual Info: 256Kx8 ROM /32Kx8 SRAM Combo Memory M í C \i O S Y DP50CM232 S T E M S DESCRIPTION: The DP50CM232 is a combination memory chip consist of 2M-bit Read Only Memory organized as 256K words by 8 bits and a 256K-bit Static Random Access Memory organized as 32K words by 8 bits.

Contextual Info: DENSE-PAC 256Kx8 ROM/32Kx8 SRAM Combo Memory DP50CM232 MICROSYSTEMS DESCRIPTION: The DP50CM232 is a combination memory chip consist of 2M-bit Read Only Memory organized as 256K words by 8 bits and a 256K-bit Static Random Access Memory organized as 32K words by 8 bits.

J1213

Contextual Info: DENSE-PAC M c R.O SYS!' s i 256Kx8 ROM/32Kx8 SRA M Combo M em ory DP50CM232 li \\ DESCRIPTION: The DP50CM232 is a combination memory chip consist of 2M-bit Read O nly Memory organized as 256K words by 8 bits and a 256K-bit Static Random Access Memory organized as 32K words by 8 bits.

Contextual Info: DENSE-PAC 256Kx8 ROM/32Kx8 SRAM Combo Memory DP50CM232-E MICROSYSTEMS D ESC R IPTIO N : The DP50CM232-E is a combination memory chip consist of 2M-bit Read Only Memory organized as 256K words by 8 bits and a 256K-bit Static Random Access Memory organized as 32K words by 8 bits.

32kx8 sram

Contextual Info: DENSE-PAC M i C R. O S Y S l ' li M S 256Kx8 ROM/32Kx8 SRA M Combo M em ory DP50CM232-E DESCRIPTION: The DP50CM232-E is a combination memory chip consist of 2M-bit Read Only Memory organized as 256K words by 8 bits and a 256K-bit Static Random Access Memory organized as 32K words by 8 bits.

Contextual Info: 256Kx8 ROM, 32Kx8 SRAM, 300/500ns, TSOP 30A183-00 A 256Kx8 ROM/32Kx8 SRAM Combo Memory DP50CM232 DESCRIPTION: The DP50CM232 is a combination memory chip consist of 2M-bit Read Only Memory organized as 256K words by 8 bits and a 256K-bit Static Random Access Memory