Untitled
Abstract: No abstract text available
Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two differential LVPECL, LVDS, HCSL, or CML input pairs to distribute to four LVDS output pairs ■ 30-ps maximum output-to-output skew
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CY2DL1504
CY2DL1504
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PDF
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2DL15
Abstract: 2DL-15 2VBQ
Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two differential LVPECL, LVDS, or CML input pairs to distribute to four LVDS output pairs ■ 30-ps maximum output-to-output skew
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CY2DL1504
30-ps
480-ps
11-ps
12-kHz
20-MHz
20-pin
CY2DL1504
2DL15
2DL-15
2VBQ
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PDF
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Untitled
Abstract: No abstract text available
Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two differential LVPECL, LVDS, HCSL, or CML input pairs to distribute to four LVDS output pairs
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Original
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CY2DL1504
CY2DL1504
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PDF
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2DL15
Abstract: JESD78B CY2DL1504ZXI 2DL-15
Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select between low-voltage positive emitter-coupled logic LVPECL or low-voltage differential signal (LVDS) input pairs to distribute to four LVDS output pairs
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Original
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CY2DL1504
CY2DL1504
2DL15
JESD78B
CY2DL1504ZXI
2DL-15
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PDF
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cy2dl1504
Abstract: No abstract text available
Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select between low-voltage positive emitter-coupled logic LVPECL or low-voltage differential signal (LVDS) input pairs to distribute to four LVDS output pairs
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Original
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CY2DL1504
CY2DL1504
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PDF
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