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    CSPU877D Search Results

    CSPU877D Result Highlights (2)

    Part ECAD Model Manufacturer Description Download Buy
    CSPU877DBVG Renesas Electronics Corporation 1.8V Phase Locked Loop Differential 1:10 SDRAM Clock Driver Visit Renesas Electronics Corporation
    CSPU877DBVG8 Renesas Electronics Corporation 1.8V Phase Locked Loop Differential 1:10 SDRAM Clock Driver Visit Renesas Electronics Corporation
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    CSPU877D Price and Stock

    Renesas Electronics Corporation CSPU877DBVG8

    IC PLL CLK DVR SDRAM 52-CABGA
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    DigiKey CSPU877DBVG8 Reel
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    Integrated Device Technology Inc IDTCSPU877DBVG

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    Bristol Electronics IDTCSPU877DBVG 4,222
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    Integrated Device Technology Inc CSPU877DBVG

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    Bristol Electronics CSPU877DBVG 4,222
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    Integrated Device Technology Inc IDTCSPU877DBVG8

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    Bristol Electronics IDTCSPU877DBVG8 4,222
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    Integrated Device Technology Inc CSPU877DBVG8

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    Bristol Electronics CSPU877DBVG8 4,222
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    CSPU877D Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CSPU877DBVG Integrated Device Technology Integrated Circuits (ICs) - Clock/Timing - Application Specific - IC PLL CLK DVR SDRAM 52-CABGA Original PDF
    CSPU877DBVG8 Integrated Device Technology Integrated Circuits (ICs) - Clock/Timing - Application Specific - IC PLL CLK DVR SDRAM 52-CABGA Original PDF

    CSPU877D Datasheets Context Search

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    2506036017Y0

    Abstract: CSPU877D IDTCSPU877D
    Text: CSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE 1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER CSPU877D DESCRIPTION: FEATURES: The CSPU877D is a PLL based clock driver that acts as a zero delay buffer


    Original     		PDF IDTCSPU877D CSPU877D 2506036017Y0 IDTCSPU877D

    Untitled

    Abstract: No abstract text available
    Text: CSPU877D 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE 1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER CSPU877D FEATURES: DESCRIPTION: • 1 to 10 differential clock distribution • Optimized for clock distribution in DDR2 Double Data Rate


    Original     		PDF IDTCSPU877D 125MHz 340MHz 52-Ball 40-pin CSPU877D