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    CS26LV64173 Search Results

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    Chiplus Semiconductor CS26LV64173HCP70

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    Vyrian CS26LV64173HCP70 1,369
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    CS26LV64173 Datasheets Context Search

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    CS26LV64173

    Contextual Info: Low Power Pseudo SRAM 4 M Words x 16 bit CS26LV64173 Revision History Rev. No. 1.0 History Issue Date 1. New Release. Mar.27, 2013 2. Product Process change from 90nm to 65nm 3. The device build in Power Saving mode as below : 3-1. Deep Power Down DPD 3-2. Partial Array Refresh (PAR)


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