CDCM1804RGER Search Results
CDCM1804RGER Result Highlights (1)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| CDCM1804RGER |
|
1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider 24-VQFN -40 to 85 |
|
CDCM1804RGER Price and Stock
Texas Instruments CDCM1804RGERIC CLK BUFFER 1:4 800MHZ 24VQFN |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
CDCM1804RGER | Reel | 3,000 |
|
Buy Now | ||||||
|
CDCM1804RGER |
|
Get Quote | ||||||||
|
CDCM1804RGER | 1,866 |
|
Buy Now | |||||||
Texas Instruments CDCM1804RGETClock Buffer 1:3 LVPECL CLOCK BUF FER A 595-CDCM1804RGER |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
|
CDCM1804RGET | 306 |
|
Buy Now | |||||||
CDCM1804RGER Datasheets (6)
| Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
|---|---|---|---|---|---|---|
| CDCM1804RGER |
|
1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT and PROGRAMMABLE DIVIDER | Original | |||
| CDCM1804RGER |
|
1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider 24-VQFN -40 to 85 | Original | |||
| CDCM1804RGER |
|
CDCM1804 - 1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider 24-VQFN -40 to 85 | Original | |||
| CDCM1804RGERG4 |
|
1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT and PROGRAMMABLE DIVIDER | Original | |||
| CDCM1804RGERG4 |
|
1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider 24-VQFN -40 to 85 | Original | |||
| CDCM1804RGERG4 |
|
CDCM1804 - 1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider 24-VQFN -40 to 85 | Original |
CDCM1804RGER Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER SCAS697 – JULY 2003 D Distributes One Differential Clock Input to VSS VDD0 Y0 Y0 VDD0 S1 24 23 22 21 20 19 15 Y1 VDDPECL 5 14 VDD1 VBB 6 13 VDD3 12 4 Y3 Y1 IN VDD2 IN 11 |
Original |
CDCM1804 SCAS697 | |
CDCM1804
Abstract: G003
|
Original |
CDCM1804 SCAS697E P0024-01 CDCM1804 G003 | |
CDCM1804
Abstract: G003
|
Original |
CDCM1804 SCAS697E P0024-01 CDCM1804 G003 | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
CDCM1804
Abstract: G003
|
Original |
CDCM1804 SCAS697E P0024-01 CDCM1804 G003 | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
|
|||
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
QFN-24 reflowContextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal QFN-24 reflow | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E 800-MHz 200-MHz 24-Terminal | |
|
Contextual Info: CDCM1804 www.ti.com SCAS697E – JULY 2003 – REVISED MAY 2005 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER S1 VDD0 17 VDD1 IN 3 16 Y1 IN 4 15 Y1 VDDPECL 5 14 VDD1 VBB 6 VDD3 1 VSS(1) 7 8 9 13 10 11 12 Thermal pad must be connected to VSS. |
Original |
CDCM1804 SCAS697E P0024- CDCM1804 | |