ADDR13 Search Results

MT48LC8M16A2

Abstract: PC15 RTL8201BL header8 DB9_MALE AT45DB128
Contextual Info: Port C Pins assignment 104 PB22/SCK1 as UART1 RI Input 122 PB27/PCK0 as UART1 DTR (Output) ADDR12 not connected to U3,U4 ADDR13 connected to U3.A11,U4.A11 See Page 139 Man.rev.from 22-Aug-03 R11 10 C27 0.1uF R14 10 C30 0.1uF R18 10 C19 0.1uF VDDPLL PLLRCA

STK 5333 s

Abstract: 1838 ir receiver b 010 22 05 feme MC68HC11KA4 STK 407 040 stk 4192 II 009C MC68HC711KA4
Contextual Info: MC68HC11KA4RG/AD MC68HC11KA4 MC68HC711KA4 PROGRAMMING REFERENCE GUIDE M m o t o r o l a Block Diagram PAI/0C1 PULSE ACCUMULATOR OC2/OC1 0C3/0C1 OC4/OC1 IC4/OC5/OC1 ICI IC2 IC3 P B 7 -< -> PB6 P B 5 < -> j m PB4 PB3 P B 2< -> 1 PB1 PBO ADDR15 ADDR14 ADDR13

83c chipset

Contextual Info: Contents Section 1 2 3 Title Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SE370C758B

Abstract: P04D SE370C756A TMS370C756A SE370C758A
Contextual Info: TMS370Cx5x 8-BIT MICROCONTROLLER SPNS010F – DECEMBER 1986 – REVISED FEBRUARY 1997 D D D D D D D D D FN / FZ PACKAGE TOP VIEW VSS1 C2 C1 MC C0 B7 B6 B5 B4 B3 B2 B1 B0 D0 / CSE2 / OCF VCC2 VSS2 VCC1 CMOS/EEPROM/EPROM Technologies on a Single Device – Mask-ROM Devices for High-Volume

Contextual Info: KSZ9692MPB/KSZ9692XPB Integrated Gigabit Networking and Communications Controller General Description The KSZ9692MPB/KSZ9692XPB is a highly integrated System-on-Chip SoC containing an ARM 922T 32-bit processor and a rich set of peripherals to address the costsensitive, high-performance needs of a wide variety of high

SPR154

Abstract: MPC509 ef80 FC-24
Contextual Info: Freescale Semiconductor, Inc. MOTOROLA Order this document by MPC509TS/D SEMICONDUCTOR TECHNICAL DATA MPC509 Technical Summary Freescale Semiconductor, Inc. PowerPC MPC509 RISC Microcontroller The MPC509 is a member of the PowerPC Family of reduced instruction set computer RISC microcontrollers (MCUs). The MPC509 implements the 32-bit portion of the PowerPC architecture, which provides 32-bit effective addresses, integer data types of 8, 16, and 32 bits, and floating-point data types

ADSP-21489 user manual

Abstract: ADSP-21487 sharc ADSP-214xx FFT Accelerator medialb ADSP-21160 ADSP-21161 ADSP-21489 ADSP21487 sharc iir filter IBIS Model diode
Contextual Info: SHARC Processor SUMMARY The ADSP-2148x processors are available with unique audiocentric peripherals, such as the digital applications interface, serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate converters, input

ande RY 192

Abstract: ande RY 228 ande RY 227 mov rdn 240 DB14-000121-00
Contextual Info: LSI402Z Digital Signal Processor User’s Guide May 2000 Order Number R14014 LSI Logic Confidential This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

SuperSPARC

Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Contextual Info: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys­

radix-8 FFT

Abstract: DBGA KD 472 M mov CMAC A15B2 sc sf 12A H4 17ER CI23 honeywell hx3000 HX3000
Contextual Info: DSP Architectures RHDSP24 Radiation Hardened Scalable DSP Chip Transform Your WorldTM Data Sheet Real 24 PORT A Imag 24 RHDSP24 Imag 24 24 24 X INPU TB US Y INPUT BU S O U TP U TB US 24 48 Imag 24 Scheduler/ Controller X Y Memory A 24 Memory B 24 System Controls

Contextual Info: MC9S12XDP512 Data Sheet HCS12X Microcontrollers MC9S12XDP512 Rev. 2.10 5/2005 freescale.com MC9S12XDP512 Data Sheet covers MC9S12XDT384 & MC9S12XA512 MC9S12XDP512V2 Rev. 2.10 5/2005 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be

Contextual Info: MC9S12XDP512 Data Sheet HCS12X Microcontrollers MC9S12XDP512 Rev. 2.09 5/2005 freescale.com MC9S12XDP512 Data Sheet covers MC9S12XDT384 & MC9S12XA512 MC9S12XDP512V2 Rev. 2.09 5/2005 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be

Contextual Info: Freescale Semiconductor, Inc. DOCUMENT NUMBER MC9S12KG128 Freescale Semiconductor, Inc. MC9S12KG128 SoC Guide V01.01 Original Release Date: 16 JUL 2002 Revised: 08 MAR 2002 Motorola, Inc. Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design.

LSI403LP

Contextual Info: Preliminary – Content Subject to Change LSI403LP Digital Signal Processor Preliminary Datasheet The LSI403LP is a 16-bit, fixed-point digital signal processor DSP based on the ZSP 400 DSP core. The LSI403LP contains an entire DSP system on a single chip, and is designed for applications requiring lower

DDA 003A

Abstract: CON12 M68HC11 MC68HC11C0 MC68HC11C0CFN2 MC68HC11C0CFU2 MC68HC11C0CFU3 MC68HC11C0FU3 MC68HC11C0MFU2 MC68HC11C0VFN2
Contextual Info: MOTOROLA Order this document by MC68HC11C0TS/D SEMICONDUCTOR TECHNICAL DATA MC68HC11C0 Technical Summary 8-Bit Microcontroller 1 Introduction The MC68HC11C0 high-performance microcontroller unit MCU is an enhanced member of the M68HC11 family of microcontrollers. Excluding its new features, the MC68HC11C0 is very similar to

1010001

Abstract: cordless phone design datasheet direct sequence spread spectrum P115 Z87000 Z87001 Z87010 Z87L01 cordless phone Transceiver IC TDD synchronizer
Contextual Info: PRELIMINARY PRODUCT SPECIFICATION 1 Z87001/Z87L01 1 ROMLESS SPREAD SPECTRUM CORDLESS PHONE CONTROLLER FEATURES Device ROM * kwords Z87001 Z87L01 64 64 RAM I/O (Words) Lines 512 512 32 32 Package Information • 144-Pin VQFP 144-Pin VQFP Note: *Maximum accessible external ROM

17CA

Abstract: M68HC16 MC16S2CPU20B1 MC16S2CPU25B1 MC68HC16S2 MC68HC16S2CPU20 MC68HC16S2CPU25 SPMC16S2CPU20 SPMC16S2CPU25 37A6
Contextual Info: Order this document by MC68HC16S2TS/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC68HC16S2 Technical Summary 16-Bit Modular Microcontroller 1 Introduction The MC68HC16S2 is a high-speed 16-bit microcontroller. It is a member of the MC68300/M68HC16 family. M68HC16 microcontrollers are built up from standard modules that interface through a common intermodule bus IMB . Standardization facilitates rapid development of devices tailored for specific applications.

MC2100 REV B

Abstract: MC2100 REV c 74109 MC2100 e rev b MC2100 Rev A MC212 MC2100 MC2300 MC2400 MC2500
Contextual Info: Navigator Motion Processor MC2100 Series Technical Specifications for Brushed Servo Motion Control Performance Motion Devices, Inc. 55 Old Bedford Road Lincoln, MA 01773 Revision 1.6, April 2002 NOTICE This document contains proprietary and confidential information of Performance Motion Devices,

3BL DBM

Abstract: 567 tone MODEL 2510 MICROPHONE CT8015 CT8015A11 DSP GROUP
Contextual Info: D S P G R O U P , TrueSpeech DSVD Co-Processor I NC . Introduction Features The CT8015 is a TrueSpeech co-processor capable of performing full duplex compression and de-compression functions for DSVD Digital Simultaneous Voice and Data Modems while maintaining M icrosoft Sound System 2.0 and

WE32100

Abstract: ALI m7 101b WE32104
Contextual Info: WE 32104 DMA Controller Description The WE 32104 DMA Controller DMAC is a mem ory-mapped peripheral device that performs memory-to-memory, memory fill, mem ory-to-peripheral, and peripheral-tomemory data transfers quickly and efficiently. The DMAC contains specialized hardware that

Contextual Info: LSI403LP Digital Signal Processor Preliminary Datasheet The LSI403LP is a 16-bit, fixed-point digital signal processor DSP based on the LSI Logic ZSP400 DSP core. The LSI403LP contains an entire DSP system on a single chip, and is designed for applications

Contextual Info: LF3324 24Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 24,883,200-bit Frame Memory 74.25 Mhz Max Data Rate 54MHz in full-time Random Access Mode May be Organized Into the Following Configurations: • 3,110,400 x 8-bit • 2,488,320 x 10-bit

Contextual Info: USER’S GUIDE LSI403LP Digital Signal Processor April 2004 DB15-000230-02 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.

Db06

Abstract: mov rdn 240 elektronik DDR D3318 haar transform
Contextual Info: User’s Guide LSI402ZX Digital Signal Processor Preliminary March 2001 R14021.B This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using