Untitled
Abstract: No abstract text available
Text: 1,M3,575 1,'ORDX 4 BIT DYNAMIC RAM * This is a ^ a n c e d information and specifications are subject to change without notice. DESCRIPTION The TC514400JL/ZL is the new generation dynamic RAM organized 1,048,576 words by 4 bits. The TC514400JL/ZL utilizes TOSHIBA'S CMOS Silicon gate process technology as well as
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TC514400JL/ZL
TC514400JL/ZL-80
TC514400JL/ZL--
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X61C
Abstract: IM65X61 256x4 static ram IM65 65X61
Text: DIMÜHim IM 6 5 X 5 1 IIM 6 5 X 6 1 1 0 2 4 2 5 6 x 4 Bit High Speed CMOS RAM FEATURES GENERAL DESCRIPTION • • • • • • • • • • • • The IM65X51 and IM65X61 are h ig h speed, low po w e r CMOS sta tic RAM s organized 256 w o rd s b y 4 bits. Inp uts and
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IM65X51/IM65X61
256x4)
55/uW
10mW/MHz
IM65X51
IM65X61
65X51
65X61
X61C
256x4 static ram
IM65
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT P D 4 5 1 2 8 4 4 1 - A 7 5 ,4 5 1 2 8 8 4 1 -A 7 5 , 4 5 1 2 8 1 6 3 -A 7 5 128M-bit Synchronous DRAM, 133MHz 4-bank, LVTTL Description The ,uPD45128441-A75, 45128841-A75 and 45128163-A75 are high-speed 134,217,728-bit synchronous dynamic
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128M-bit
133MHz
uPD45128441-A75
45128841-A75
45128163-A75
728-bit
54-pin
M14378EJ1V0DS00
uPD45128xxx
uPD45128xxxG5
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Untitled
Abstract: No abstract text available
Text: M O SEL VTTEUC PRELIMINARY V104J232 512K x 32 SIMM Features Description 524,288 x 32 bit organizations Utilizes 256K x 4 CMOS DRAMs Fast access times 70 ns, 80 ns, 100 ns Fast Page mode operation Low power dissipation _ CAS before RAS refresh, RAS only refresh, and
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V104J232
72-lead
V104J232
DD03350
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TC59S6432bft
Abstract: No abstract text available
Text: TOSHIBA TENTATIVE TC59S6432BFT/BFTL-80,-10 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 524,288-WORDSX4BANKSX32-BITS SYNCHRONOUS DYNAMIC RAM DESCRIPTION TC59S6432BFT/BFTL is a CMOS synchronous dynamic random access memory organized as 524,288words X 4 banks X 32 bits.
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TC59S6432BFT/BFTL-80
288-WORDSX4BANKSX32-BITS
TC59S6432BFT/BFTL
288words
TC59S6432BFT/B
FTL-80
62MAX
TC59S6432bft
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MB88307
Abstract: MD-883 MB88300 mb89300
Text: FU JITSU M B 8 8 3 0 6 M B 8 8 3 0 9 M B 8 8 3 0 7 M B 8 8 3 0 8 octobengae CMOS Output Expander DESCRIPTION Each of the four expanders provides a ierla! I/O port and an 8-bit paral lel output port. Data is serially loaded via the input port, converted to an
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MB88306
MB88307
MB88308
MB88309
DIP-16P-M02)
10-LEAD
MD-883
MB88300
mb89300
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707j
Abstract: XC002 D42S161
Text: DATA SHEET NEC MOS INTEGRATED CIRCUIT ju P D 42S 16 16 5 , 4 2 16 16 5 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, EDO, BYTE READ/WRITE MODE Description T h e /¿PD 42S16165, 421 6 1 6 5 a re 1,048,576 w o rd s b y 16 b its C M O S dy n a m ic R A M s w ith o p tio nal ED O .
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16-BIT,
42S16165,
50-pin
42-pin
IR35-207-3
VP15-207-3
707j
XC002
D42S161
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MN5280
Abstract: MN5282 MN5284
Text: MN5280 MN5282 / K K f f M ic r o N e tw o r k s a d iv is i o n o r u n « t m o m c o r p o ra tio n DIP-PACKAGED 16-Bit A/D C O N V E R T E R S DESCRIPTION FEATURES • Small 32-Pin DIP • Internal Clock and Reference • Maximum Conversion Time: MN5280 100/tsec
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MN5280
MN5282
16-Bit
32-Pin
100/tsec
MN5282
50psec
14-Bit
12ppm/
MN5284
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OB2201
Abstract: T1D22 PD4217805
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT /; P D 4 2 S / 1 7 8 0 5 , 4 2 1 7 8 0 5 16 M-BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, HYPER PAGE MODE D e s c rip tio n T h e /¿PD 42S17 8 0 5 ,4 2 1 7 8 0 5 a re 2 ,0 9 7 ,1 5 2 w o rd s by 8 b its C M O S d y n a m ic R A M s w ith o p tio n a l h y p e r p a g e m o de .
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42S17
PD42S17805,
PD42S17805G5,
4217805G5
iPD42S17805LE,
4217805LE
28-pin
b42752S
OB2201
T1D22
PD4217805
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Untitled
Abstract: No abstract text available
Text: IN T E L CORP -CMEMORY/LOGIC} n 4826176 IN TEL CORP M EM O RY/LO G IC i>Ë| LiüHblTfc, O D S ä ^ S 99D 58935 D 29C13 AND 29C14 CHMOS COMBINED SINGLE-CHIP PCM CODEC AND FILTER AT&T D3/D4 and CCITT Compatible 29C14 Asynchronous Clocks, 8th Bit Signaling, Loop Back Test Capability
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29C13
29C14
28-Pin
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Untitled
Abstract: No abstract text available
Text: HM538123 Series 131,072-Word x 8-Bit Multiport CMOS Video RAM • DESCRIPTION HM538123 Series The HM538123 is a 1-Mbit multiport video RAM equipped with a 128k-word x 8 -bit dynamic RAM and a 256-word x 8 -bit SAM serial access memory . Its RAM and SAM operate independently and asynchronously. It can transfer data between
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HM538123
072-Word
128k-word
256-word
HM538123.
CP-40D)
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2SK1845
Abstract: 3sk85 2SK408 equivalent 3SK1 3sk156 3sk217 3SK228 3SK103 2sc464 2SC3511
Text: HITACHI Ultra High Frequency Devices DATA BOOK H IT A C H I ADE-41 CONTENTS • GENERAL INFORMATION. . . . . . 5 Si Bipolar Transistors.
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ADE-41
D-8013
2SK1845
3sk85
2SK408 equivalent
3SK1
3sk156
3sk217
3SK228
3SK103
2sc464
2SC3511
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NEC uPD 833
Abstract: NEC 4216160
Text: NEC / DATA SHEET MOS INTEGRATED CIRCUIT _ ^uPD42S16160,4216160,42S18160,4218160 1 6 M - B IT D Y N A M IC R A M 1 M -W O R D B Y 1 6 -B IT , F A S T P A G E M O D E , B Y T E R E A D / W R IT E M O D E Description T h e ^ P D 4 2 S 1 6 1 6 0 , 4 2 1 6 1 6 0 , 4 2 S 1 8 1 6 0 , 4 2 1 8 1 6 0 a re 1 ,0 4 8 , 5 7 6 w o rd s b y 16 b its C M O S d yn a m ic R A M s. T h e
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uPD42S16160
uPD4216160
uPD42S18160
uPD4218160
50-pin
42-pin
VP15-207-2
NEC uPD 833
NEC 4216160
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SI HV5
Abstract: No abstract text available
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT / ¿ ¿ P D 4 2 6 4 16 5 , 4 2 6 5 16 5 64 M-BIT DYNAMIC RAM 4 M-WORD BY 16-BIT, HYPER PAGE MODE EDO , BYTE READA/VRITE MODE Description T h e;/P D 426 416 5, 4265165 are 4,194.304 w ords by 16 bits C M OS dynam ic RAMs with optional h yper page mode
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16-BIT,
50-pin
uPD4264165-A50
uPD4265165-A50
uPD4264165-A60
uPD4265165-A60
S50GS-80-7JF3
PD4264165,
iPD4264165G5-7JF,
65165G
SI HV5
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