77V011
Abstract: 77V012 77V500 AN-301 V400 V500
Text: 77V500 Application Note AN-301 Sub Tending Using Priority Levels Notes By Fred Santilo Revisio sion Histo Histo ry May 2, 2001: Initial publication. Introd roducti ction This application note is to be used in conjunction with Application Note 258 SwitchStar Cell-Bus Operation with 2.5Gbps ATM Switch Example.
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77V500
AN-301
77V011
77V012
AN-301
V400
V500
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256K DPRAM
Abstract: IDT70914 IDT709149 70V261 70V25 70V24
Text: SYNCHRONOUS DUAL-PORT STATIC RAMS FOR DSP AND COMMUNICATION APPLICATIONS APPLICATION NOTE AN-144 Integrated Device Technology, Inc. By Jeffrey C. Smith ABSTRACT The Sequential Access Random Access Memory The first of the synchronous components to be presented
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AN-144
70V9079
70V9089
70V9269
70V9279
71V30
71V321
70V05
70V06
70V07
256K DPRAM
IDT70914
IDT709149
70V261
70V25
70V24
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body marking MCL
Abstract: IDT77155 IDT77V400 IDT77V500 IDT77V550 IDT79R36100 IDT79RV3041 IDT79RV4640 PN100-1 osam marking code
Text: SWITCHStARTM PRELIMINARY ATM CELL BASED 77V500 1.24Gbps NON-BLOCKING INTEGRATED SWITCH CONTROLLER Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip controller for IDT77V400 Switching Memory One 77V500 and one IDT77V400 form the core required
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IDT77V500
24Gbps
IDT77V400
IDT77V500
430mW
body marking MCL
IDT77155
IDT77V550
IDT79R36100
IDT79RV3041
IDT79RV4640
PN100-1
osam marking code
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IDT77155
Abstract: IDT77V400 IDT77V500 IDT77V550 IDT79R36100 IDT79RV3041 IDT79RV4640 s-link
Text: SECTION 3 77V500 Switch Controller 3.1 77V500 Switch Controller Description The 77V500 manages the IDT77V400, a single device shared memory ATM switch. The IDT77V400 provides cell buffers implemented in Fusion Memory technology and, as the name implies, a data path for ATM cells. It also provides a means by which an external
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IDT77V500
IDT77V400,
IDT77V400
IDT77155
IDT77V550
IDT79R36100
IDT79RV3041
IDT79RV4640
s-link
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IDT77V1264L200
Abstract: No abstract text available
Text: IDT77V1264L200 Quad Port PHY Physical Layer for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications Description Features List Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for
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IDT77V1264L200
af-phy-040
77V1254L25
77V1264L200
IDT77V1264L200
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DSLAM
Abstract: 77V011 77V012 77V1054 77V1253 77V1254 77V400 77V500 77V550 DSLAM HEADER
Text: DSLAM Digital Subcriber Line Access Multiplexer Application Brief #5 Introduction The Digital Subscriber Line Access Multiplexer DSLAM is a communications device that transmits and receives digital signals from multiple Digital Subscriber Lines (xDSL) over copper subscriber loops.
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77V1254
77V1054
77V1253
77V500
77V252
77V222
77V400
APP-BRF5-00050
DSLAM
77V011
77V012
77V1054
77V1253
77V1254
77V400
77V500
77V550
DSLAM HEADER
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ATM25
Abstract: IDT77V1264L200 ST6200T
Text: IDT77V1264L200 Quad Port PHY Physical Layer for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications Description Features List Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for
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IDT77V1264L200
af-phy-040
77V1254L25
144-Pin
PU-144)
77V1264L200
77V1254
25Mb/s
ATM25
IDT77V1264L200
ST6200T
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round robin bus arbitration
Abstract: verilog code for crossbar switch Integrated Device Technology CROSS
Text: Integrated Device Technology IDT IDT Switching Switching Solutions Solutions Integrated Device Technology 1 1 Integrated Device Technology The The Data Data Unit Unit of of Switches Switches ³ For cells ³ Fixed sized data units ³ Switch memory width can be same as cell size
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Untitled
Abstract: No abstract text available
Text: Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA - 95054 Phone #: 408 727-6116 Fax #: (408) 727-2328 PRODUCT DISCONTINUANCE NOTICE (PDN) PDN #: Last Buy Date: I01-01 Issue Date: 06/14/01 06/14/02 Last Ship Date: 09/14/02 (3 months after last buy date)
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I01-01
77V400S155DS
77V400S155DSI
77V400S155BC
77V400S155BCI
77V400S156DS
77V400S156DSI
77V400S156BC
77V400S156BCI
77V500S27PF
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adsl splitter dslam circuit diagram
Abstract: D link adsl modem board flow switch water pump circuit diagram for 3 phase DSLAM structure HDSL Modem circuit diagram DSLAM board fiber dsl
Text: Integrated Device Technology ADSL ADSL System System Solutions Solutions Broadband Access Technology Integrated Device Technology Copyright 1997, Integrated Device Technology, Inc 1 1 1 Integrated Device Technology Possible Possible Services Services Over
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RX 433
Abstract: No abstract text available
Text: IDT77V1254L25 Quad Port PHY Physical Layer for 25.6 and 51.2 ATM Networks Features List ! ! ! ! ! ! ! ! ! ! ! ! Description Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for four 25.6 Mbps ATM channels
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IDT77V1254L25
IDT77V1254L25
77V1254L25-to-ATM
16-bit
RX 433
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77V011
Abstract: 77V400 77V500
Text: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 Phone #: 408 284-8200 PRODUCT DISCONTINUANCE NOTICE (PDN) PDN #: PDN I- 08-03 January 20, 2009 Issue Date: Contact: Title: Phone #: Fax #: E-mail: Last Buy Deadline for Submission of Order:
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77V400S156BC
77V400S156BCG
77V400S156DS
77V500S25BC
77V500S25BCG
77V500S25PF
FRA-2265-01
QCA-1795
77V011
77V400
77V500
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en4900g
Abstract: EME-G600 71V3558X EN4900 EME-G700 7024S55PFG CRM1076 70261S55PFI 72v2111l15pfgi EN-4900
Text: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA - 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: A0811-01 DATE: 26-Mar-2009 MEANS OF DISTINGUISHING CHANGED DEVICES: Product Affected: Selective TQFP Packages (Standard and RoHS)
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A0811-01
26-Mar-2009
26-Jun-2009
CHANG2P9731PFG8
82P9732PF
82P9732PF8
82P9732PFG
82P9732PFG8
82V1054APF
82V1054APF8
en4900g
EME-G600
71V3558X
EN4900
EME-G700
7024S55PFG
CRM1076
70261S55PFI
72v2111l15pfgi
EN-4900
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PEAK tray drawing
Abstract: 12C-1313-119 daewon 89HPES4T4ZBBCGI TRAY MPPO DAEWON tray drawing PBGA144 daewon tray 72T1 PBGA-144
Text: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: TB0908-03 DATE: 9/16/2009 Product Affected: 13 mm x 13 mm PBGA-144 & 13 mm x 13 mm CABGA-144 Date Effective: Contact: Title: Phone #:
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TB0908-03
PBGA-144
CABGA-144
72V36110L7-5BB
72V36110L7-5BBG
72V36110L7-5BBGI
72V36110L7-5BBI
72V3640L6BB
72V3640L6BBG
72V3640L7-5BB
PEAK tray drawing
12C-1313-119
daewon
89HPES4T4ZBBCGI
TRAY MPPO
DAEWON tray drawing
PBGA144
daewon tray
72T1
PBGA-144
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100-PIN
Abstract: IDT77V400 IDT77V500 IDT79R36100 IDT79RV3041 IDT79RV4640 PN100-1
Text: ATM CELL BASED NON-BLOCKING SINGLE CHIP SWITCH CONTROLLER ADVANCED INFORMATION 77V500 Integrated Device Technology, Inc. • Available in a 100-pin Thin Plastic Quad Flat Pack TQFP FEATURES: • Single chip controller for IDT77V400 Switching Memory • One 77V500 and one IDT77V400 form the core
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IDT77V500
100-pin
IDT77V400
IDT77V500
24Gbps
27nsacitance
PN100-1)
IDT79R36100
IDT79RV3041
IDT79RV4640
PN100-1
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B1416
Abstract: E1113 1CS MARKING IDT77V400 IDT77V500 IDT77V550 13-bitcell m1416 s156 A1516
Text: IDT77V400 SwitchStarTM ATM Cell Based 8 x 8 1.2Gbps non-blocking Integrated Switching Memory Features List ! Single chip supports an 8 x 8 port switch at 155Mbps per port ! Central Memory Architecture eliminates Head-of-Line Blocking by sharing the memory array with all ports
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IDT77V400
155Mbps
330mW
155Mbps
32-bit
B1416
E1113
1CS MARKING
IDT77V400
IDT77V500
IDT77V550
13-bitcell
m1416
s156
A1516
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Untitled
Abstract: No abstract text available
Text: 1.2 Gbps 8 port ATM Switch IDT SwitchBIOS Programmer’s Guide Revision 4.0.1 Date 4/28/1999 Table of Contents Chapter 1 INTRODUCTION. 4 1.1 Data Path Overview. 4
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77V400
Abstract: 77V500 IDT77500 IDT77V011 IDT77V012 IDT77V400 IDT77V500 V400 OD031
Text: Page 1 of 35 Application Note 258 SwitchStar Cell-Bus Operation with 2.5Gbps ATM Switch Example SwitchStar Cell-Bus The SwitchStar Cell-Bus mode enables multiple SwitchStar chipsets to be combined in a scalable architecture to provide greater bandwidth than a single chipset. Individually,
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16x16
IDT77500/IDT77V400s.
IDT77V500s
IDT77V400s
77V400
77V500
IDT77500
IDT77V011
IDT77V012
IDT77V400
IDT77V500
V400
OD031
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77V011
Abstract: 77V012 IDT77010 IDT77252 IDT77V011
Text: 1.2 Gbps 8 port ATM Switch IDT SWDEMO Users Manual Revision 4.0.1 Date 4/27/1999 Table of Contents Chapter 1 SWDEMO Users Guide. 5 1.1 SWDEMO Hardware and Driver Selection. 5
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SWDEMO11
idt77252
77V011
77V012
IDT77010
IDT77V011
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ATM25
Abstract: IDT77V1264L200 ST6200T
Text: IDT77V1264L200 Quad Port PHY Physical Layer for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications Description Features List ! ! ! ! ! ! ! ! ! ! ! ! ! Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for
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IDT77V1264L200
af-phy-040
77V1254L25
144-Pin
PU-144)
77V1264L200
77V1254
25Mb/s
ATM25
IDT77V1264L200
ST6200T
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77V1253
Abstract: IDT77V1253
Text: Triple Port PHY Physical Layer for 25.6 and 51.2 Mbps ATM Networks PRELIMINARY IDT77V1253 Integrated Device Technology, Inc. FEATURES DESCRIPTION • Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for
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IDT77V1253
af-phy-040
144-pin
77V1253
IDT77V1253
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Untitled
Abstract: No abstract text available
Text: SWITCHStAR ATM CELL BASED NON-BLOCKING SINGLE CHIP PRELIMINARY 77V500 SWITCH CONTROLLER without derating for larger switch configurations • Industrial temperature range -40° C to +85° C available • S ingle+3.3V ± 0.3V power supply • Available in a 100-pin Thin Plastic Quad Flat Pack
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IDT77V500
IDT77V400
IDT77V500
24Gbps
-430mW
37MHz)
100-pin
PK100-1;
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Untitled
Abstract: No abstract text available
Text: SWITCHStAR PRELIMINARY ATM CELL BASED 77V500 1.24Gbps NON-BLOCKING INTEGRATED SWITCH CONTROLLER \ * 'fcfcM S’* v \. Features * Single chip controller for IDT77V400 Switching Memory * One 77V500 and one IDT77V400 form the core required for a 1.24Gbps 8 x 8 port non-blocking switch
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IDT77V500
24Gbps
IDT77V500
IDT77V400
300mV
100-pin
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nrzi clock recovery
Abstract: 77V1254 IDT77V1254 P3TC SF1153
Text: Quad Port PHY Physical Layer for 25.6 and 51.2 Mbps ATM Networks PRELIMINARY IDT77V1254 Integrated Device Technology, Inc. FEATURES DESCRIPTION • Performs the PHY-Transmission Convergence (TC) and Physical Media Dependent (PMD) Sublayer functions for four 25.6 Mbps ATM channels
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IDT77V1254
af-phy-040
144-pin
nrzi clock recovery
77V1254
IDT77V1254
P3TC
SF1153
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