74LS245 IC Search Results

74LS245 application

Abstract: logic diagram of 74LS245 74ls245 74ls245 motorola TTL 5400 motorola SN54/74LS245 751d-03 SN54LSXXXJ SN74LSXXXN motorola TTL 5400
Contextual Info: SN54/74LS245 OCTAL BUS TRANSCEIVER The SN54 / 74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input (E) can be used

74ls245

Abstract: 74LS245 application logic diagram of 74LS245 TTL 74ls245 SN54LSXXXJ SN74LSXXXN LS 74LS245
Contextual Info: SN54/74LS245 OCTAL BUS TRANSCEIVER The SN54 / 74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input (E) can be used

N8T125N

Abstract: 8T125 N8T125 74LS245 SIGNETICS
Contextual Info: 8T125 Signetics Transceiver Octal 3-State Transceiver Product Specification Logic Products FEATURES • • • • • Octal bidirectional bus interface 3-State buffer outputs PNP inputs for reduced loading Hysteresis on all Data inputs Pin compatible with 74LS245

ttl buffer 74LS245

Abstract: 74ls245 74LS245PC function table of 74LS245 buffer 74LS245 TTL 74ls245 1N3064 1N916 74LS LS245
Contextual Info: Signetìcs 74LS245 Transceiver Octal Transceiver 3-State Product Specification Logic Products FEATURES • Octal bidirectional bus interface • 3-State buffer outputs • PNP inputs for reduced loading • Hysteresis on all Data inputs TYPE TYPICAL PROPAGATION

function table of 74LS245

Abstract: 74LS245 ttl buffer 74LS245 74LS245 SIGNETICS TTL 74ls245 N74LS245N 74LS245 interface of 74LS245 signetics 74LS245
Contextual Info: Signetics 74LS245 Transceiver Octal Transceiver 3-State Product Specification Logic Products FEATURES • Octal bidirectional bus interface • 3-State buffer outputs • PNP inputs for reduced loading • Hysteresis on all Data inputs DESCRIPTION The 'LS245 is an octal transceiver fea­

IC 74ls245

Contextual Info: 8-Bit Buffer Transceiver MORE DETAIL SN54/74LS245 SEE Features/ Benefits T'°N Ordering Information • Three-state outputs drive bus lines • Low current PNP inputs reduce loading • Symmetric —equal driving capability in each direction PART NUMBER TYPE

N8T125N

Abstract: 1N3064 74LS 74LS245 8T125 ttl buffer 74LS245 N8T125 74LS245 SIGNETICS
Contextual Info: Signetics 8T125 Transceiver Octal 3-State Transceiver Product Specification Logic Products FEATURES • • • • • Octal bidirectional bus interface 3-State buffer outputs PNP Inputs for reduced loading Hysteresis on all Data inputs Pin compatible with 74LS245

N8T125N

Abstract: function table of 74LS245 8T125 1N3064 1N916 74LS 74LS245 N8T125 TTL 74ls245
Contextual Info: Signetics 8T125 Transceiver Octal 3-State Transceiver Product Specification Logic Products FEATURES • • • • • Octal bidirectional bus interface 3-State buffer outputs PNP inputs for reduced loading Hysteresis on all Data inputs Pin compatible with 74LS245

74LS245 buffer ic

Abstract: ic 74ls245 74LS245 74LS245 SIGNETICS 74LS245 interface function table of 74LS245 LS 74LS245
Contextual Info: Signetics 74 LS 2 45 Transceiver Octal Transceiver 3-State Product Specification Logic Products FEATURES • Octal bidirectional bus interface • 3-State buffer outputs TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 8ns 58 mA 74LS245 • PNP inputs for reduced loading

74LS245

Abstract: 74LS245 buffer buffer 74LS245 74LS245 interface 338 u LS245 SN54LS245 SN74LS245
Contextual Info: 8-Bit Buffer Transceiver MORE DETAIL SEE SECTION _ SN 54/74LS245 i3 Features/B enefits Ordering Inform ation • Three-state outputs drive bus lines • Low current PNP inputs reduce loading • Symmetric — equal driving capability In each direction • 20-pin SKINNYDIP saves space

54LS245

Contextual Info: SN54LS245, SN44LS245 OCTAL BUS TRANSCEIVERS WITH 3 STATE OUTPUTS OCTOBER 1976 —REVISED MARCH 1988 Bi-directional Bus Transceiver in a HighDensity 20-Pin Package SN 54LS245 . . J OR W PACKAGE SN 74LS245 . . . DW OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines Directly

Contextual Info: GD54/74LS245 OCTAL BUS TRANSCEIVER; NON-INVERTED 3-STATE OUTPUTS Feature Pin Configuration • Bidirectional Bus Transceiver in a High-Density 20-Pin Package • 3-State Outputs Dirve Bus Lines Directly • P-N-P Inputs D-C Loading on Bus Lines • Hysteresis at Bus Inputs Improve Noise Margins

VCC71

Abstract: LS245
Contextual Info: FOR M O R E D ET A IL S E E SEC T IO N 8 -B it Buffer Transceiver SN54/74LS245 Features/ Benefits • Three-state outputs drive bus lines • Low current PN P Inputs reduce loading • Symmetric - equal driving capability In each direction 12 Ordering Inform ation

Contextual Info: LS TTL DN74LS Series DN74LS245 DN74LS245 Octal Bus Transceivers with 3-state Outputs H Description P -3 D N 74LS245 contains eight bus transm itter/reciver circuits w ith non-inverted o utputs. • Features • B idirectional transfer or separation capability for tw o 8-bit

ic 74ls245

Contextual Info: Ä MOTOROLA SN54LS245 SN74LS245 D E SC R IPTIO N — Th eSN 54LS/74LS245 is an Octal BusTransmitter/ Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input (DR) controls transmission of Data from bus A to bus Bor bus B to bus A depending upon its logic level. The

74LS245

Abstract: 54LS 74LS
Contextual Info: GD54/74LS245 OCTAL BUS TRANSCEIVER; NON-INVERTED 3-STATE OUTPUTS Feature Pin Configuration • • • • • Bidirectional Bus Transceiver in a High-Density 20-Pin Package 3-State Outputs Dirve Bus Lines Directly P-N-P Inputs D-C Loading on Bus Lines Hysteresis at Bus Inputs Improve Noise Margins

74LS245

Abstract: 74LS245 non inverting bus transceiver 54LS 74LS function table of 74LS245
Contextual Info: GD54/74LS245 OCTAL BUS TRANSCEIVER; NON-INVERTED 3-STATE OUTPUTS Feature Pin Configuration • Bidirectional Bus Transceiver in a H igh-Density • • • • 2 0 -P in P ackage 3 -S ta te O utputs Dirve Bus Lines Directly P -N -P Inputs D-C Loading on Bus Lines

ttl buffer 74LS245

Abstract: 74LS245 function table of 74LS245 74LS245 buffer buffer 74LS245 74LS245 interface 1N3064 1N916 74LS LS245
Contextual Info: S ignetics 74LS245 Transceiver Octal Transceiver 3-State Product Specification Logic Products FEATURES • Octal bidirectional bus interface • 3-State buffer outputs TYPE T Y P IC A L PR O P A G A TIO N D ELAY T Y P IC A L SU PP LY C U R R E N T (T O T A L )

Contextual Info: | \ / | | aTB E5| ISO-CMOS Octal Bus Transceivers "I " with 3 -S ta te Buffered Outputs Technical Data M D54SCS45, M D 54SC 545 M D74SCE45, M D74SC545 OCT 1BS Features Ordering Information • Pin co m p a tib le w ith 54/74LS245 types MD54SCXXXAC MD74SCXXXAC

Contextual Info: 245 CONNECTION DIAGRAM PINOUT A l / 54LS/74LS245 OCTAL BUS TRANSCEIVER With 3-State Outputs DESCRIPTION— The 'LS245 is an octal bus transmitter/receiver designed for 8-line asynchronous 2-way data communication between data busses. Direction input (DR) controls transmission of data from bus A to bus B or bus

DN74LS245

Abstract: MA161
Contextual Info: DN74LS245 LS TTL DN74LS Series DN74LS245 ro 74LS^4-S' O ctal Bus T r a n sc e iv e r s w ith 3 -sta te O u tp u ts • Description P-3 D N 74LS245 contains eight bus transm itter/receiver circuits with non-inverted outputs. ■ Features • • • • •

pj 54 diode

Abstract: PJ 74 DIODE 74ls245 logic diagram
Contextual Info: M M O TO RO LA D ES C R IP T IO N — The SN 54LS/74LS245 is an Octal Bus Transmitter/ Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input (DR) controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The

ttl buffer 74LS245

Abstract: 74LS245 application 1N3064 74LS245 G74SC245D G74SC245P
Contextual Info: G 74SC 245 H B Microcircuits C M O S Octal Bus Transceivers w ith 3-S ta te Buffered Outputs Features G en eral D escrip tio n • Pin c o m p a tib le w ith 74LS245 T h is o c ta l bus tra n s c e iv e r c irc u it is d e s ig n e d fo r h ig h -s p e e d

buffer 74LS245

Abstract: 74ls245 intel 74ls74 pin configurations 26C92 A1625 74LS245 application 74LS245 buffer buffer 74ls244 free 74ls74 pin configurations UDS protocols
Contextual Info: Philips Semiconductors Article reprint Complex datacom peripheral ICs interface to many processors Revised by: A. Kazmi Single-chip datacom peripherals have become so powerful they now implement a variety of software-selectable protocols. A large family of such devices is designed to interface to the 68000 and 80x