74HC2 Search Results

Contextual Info: [ /Title CD74 HC137 , CD74 HCT13 7, CD74 HC237 , CD74 HCT23 7 /Subject (High Speed CD74HC137, CD74HCT137, CD54/74HC237, CD74HCT237 Data sheet acquired from Harris Semiconductor SCHS146A March 1998 - Revised May 2000 High Speed CMOS Logic, 3-to-8 Line Decoder

74HCT25

Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 5 — 7 August 2012 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC

CD74HC138MT

Abstract: CD74HC138M96E4 74HC138
Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/

Contextual Info: 74HC237 3-to-8 line decoder, demultiplexer with address latches Rev. 6 — 23 August 2012 Product data sheet 1. General description The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL LSTTL . The 74HC237 is specified in compliance with JEDEC

CD54HC240F3A

Abstract: CD54HC244F3A CD54HCT240F3A CD54HCT241F3A CD74HC241 HC241 74HC244
Contextual Info: [ /Title CD74 HC240 , CD74 HCT24 0, CD74 HC241 , CD74 HCT24 1, CD74 HC244 , CD74 Data sheet acquired from Harris Semiconductor SCHS167E CD54/74HC240, CD54/74HCT240, 74HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High-Speed CMOS Logic Octal Buffer/Line Drivers, Three-State

74HC238

Abstract: 74HCT238 DHVQFN16 EQUIVALENT 74HC238 SOT763-1 74HC238D 74HC238DB 74HC238N 74HC238PW JESD22-A114E
Contextual Info: 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer Rev. 03 — 16 July 2007 Product data sheet 1. General description 74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL LSTTL . The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1,

74HC259

Abstract: 74HCT259 74LV259 74LV259BQ 74LV259D 74LV259DB 74LV259N 74LV259PW JESD22-A114E
Contextual Info: 74LV259 8-bit addressable latch Rev. 03 — 2 January 2008 Product data sheet 1. General description The 74LV259 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC259 and 74HCT259. The 74LV259 is a high-speed 8-bit addressable latch

74HC2G32

Abstract: 74HC2G32DC 74HC2G32DP 74HCT2G32 74HCT2G32DC 74HCT2G32DP JESD22-A114E
Contextual Info: 74HC2G32; 74HCT2G32 Dual 2-input OR gate Rev. 03 — 12 May 2009 Product data sheet 1. General description The 74HC2G32 and 74HCT2G32 are high-speed Si-gate CMOS devices. They provide two 2-input OR gates. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.

74HC27

Abstract: dhvqfn14 74HC27N 74HC27BQ 74HC27D 74HC27DB 74HC27PW 74HCT27 JESD22-A114E HCT273
Contextual Info: 74HC27; 74HCT27 Triple 3-input NOR gate Rev. 03 — 7 January 2008 Product data sheet 1. General description The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . The 74HC27; 74HCT27 provides the 3-input NOR function.

74HC

Abstract: 74HC2G66 74HC2G66DC 74HC2G66DP 74HCT2G66 74HCT2G66DC 74HCT2G66DP JESD22-A114E
Contextual Info: 74HC2G66; 74HCT2G66 Dual single-pole single-throw analog switch Rev. 05 — 26 January 2009 Product data sheet 1. General description 74HC2G66 and 74HCT2G66 are high-speed Si-gate CMOS devices. They are dual single-pole single-throw analog switches. Each switch has two input/output pins

Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/

LS298

Abstract: cmos data selector data selector 74HC MC74HCXXXN 74hc298
Contextual Info: g MC54/74HC298 MOTOROLA Product Preview HIGH-PERFORMANCE CMOS LOW-POWER COMPLEMENTARY MOS SILICON-GATE QUAD 2-INPUT DATA SELECTOR/ MULTIPLEXER W ITH OUTPUT LATCH The MC54/74HC298 is identical in pinout to the LS298. The device in­ puts are compatible w ith standard CMOS outputs; w ith pullup

TEXAS HC221

Abstract: 74hc221 TTL IC 74HC221
Contextual Info: [ /Title CD74 HC221 , CD74 HCT22 1 /Subject (High Speed CMOS Logic Dual Monos table Multi- CD54/74HC221, CD74HCT221 Data sheet acquired from Harris Semiconductor SCHS166D November 1997 - Revised July 2002 High Speed CMOS Logic Dual Monostable Multivibrator with Reset

74hc297 application notes

Abstract: SCHA002 HC297 74ls297 SCHA003 74HC297
Contextual Info: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54/74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177A High-Speed CMOS Logic Digital Phase-Locked-Loop November 1997 - Revised May 2000 Features

3 bit parity checker using cmos

Abstract: 4 bit even parity generator circuit 4000B 74LS280 M74HC280 M74HC280P CRD Diode 4 bit parity generator using cmos
Contextual Info: M IT S U B IS H I HIGH S P E E D C M O S M 74HC280P 9 - B IT O D D /E V E N P A R IT Y G E N E R A T O R /C H E C K E R DESCRIPTION The 74HC280 is a semiconductor integrated circuit con­ sisting of a 9-bit parity generator/checker. FEATURES • • CONFIGURATION TOP VIEW

MN74HC243

Abstract: MN74HC243S TA425
Contextual Info: High-Speed CMOS Logic MN74HC Series m n 74H C 243/ m n 74HC243S 74HC243/74HC243S Quad T R I - S T A T E T r a n s c e i v e r s • Description P-1 M N 74H C 243/M N 74H C 243S are high-speed tri-stat 2 output and non-inverted buffer transferring input bi-directiorially and unsynchronously through a data bus line. High-speed operation

Contextual Info: GD54/74HC283, GD54/74HCT283 4-BIT BINARY FULL ADDER WITH FAST CARRY General Description These d evices are identical in pinout to Pin Configuration the 5 4 /7 4 L S 2 8 3 . This full ad d er perform s the addition of tw o 4-b it binary num bers with internal carry

74ls72

Abstract: IC 74hc266 74LS7266 HC266 data sheet IC 74hc266 HC7266 M54HCXXXF1R 74HC266 M74HCXXXC1R M74HCXXXB1R
Contextual Info: M54/74HC266 M54/74HC7266 HC266 QUAD EXCLUSIVE NOR GATE WITH OPEN DRAIN HC7266 QUAD EXCLUSIVE NOR GATE . . . . . . . . HIGH SPEED tPD = 10 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)

74HCT259

Abstract: 74HC259 CD54HC259F3A CD54HCT259F3A CD74HC259E CD74HC259M HC259 HCT259
Contextual Info: [ /Title CD74 HC259 , CD74 HCT25 9 /Subject (High Speed CMOS Logic 8-Bit Addres sable Latch) CD54/74HC259, CD54/74HCT259 Data sheet acquired from Harris Semiconductor SCHS173A High Speed CMOS Logic 8-Bit Addressable Latch November 1997 - Revised May 2000

74hc240a

Abstract: hC244A HC240A LS240 MC54HCXXXAJ MC74HCXXXAN
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal 3-State Inverting Buffer/ Line Driver/Line Receiver MC54/74HC240A High–Performance Silicon–Gate CMOS The MC54/74HC240A is identical in pinout to the LS240. The device inputs are compatible with standard CMOS outputs; with pullup resistors,

74hc244a

Abstract: hC244A 940C HC240A LS244 MC54HCXXXAJ MC74HCXXXAN B1912
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver High–Performance Silicon–Gate CMOS MC54/74HC244A J SUFFIX CERAMIC PACKAGE CASE 732–03 20 1 The MC54/74HC244A is identical in pinout to the LS244. The device

s276

Abstract: C074H
Contextual Info: Technical Data CD54/74HC258 CD54/74HCT258 F ile N u m b e r 1775 Texas In s t r u m e n t s High-Speed CMOS Logic D a ta s h e e t a c q u ire d fro m H a rris S e m ic o n d u c to r SC H S276 Quad 2-Input Multiplexer with 3-State Inverting Outputs Type Features:

74HC14D

Abstract: TC74HCT14 74hc595d TC74HCT14AF NXP 74HC14D 74HCT04D 74HCT14PW 74HC125DR2G 74HC14D-T 74HCT14D
Contextual Info: ON SEMI 74HC00DR2G 74HC00DTR2G 74HC02DR2G 74HC02DTR2G 74HC04DR2G 74HC04DTR2G 74HC08DR2G 74HC08DTR2G 74HC125DR2G 74HC125DTR2G 74HC132DR2G 74HC132DTR2G 74HC138DR2G 74HC138DTR2G 74HC14DR2G 74HC14DTR2G 74HC244DTR2G 74HC245DTR2G 74HC32DR2G 74HC32DTR2G 74HC373DTR2G

74HCT243M

Contextual Info: Technical Data CD54/74HC242, CD54/74HCT242 CD54/74HC243, CD54/74HCT243 File Num ber 1488 High-Speed CMOS Logic F U N C TIO N A L DIAGRAM Quad-Bus Transceiver with 3-State Outputs Type Features: • Typical pro p a g a tio n delay A -— •B o f 7 ns @ Vcc = 5 V