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    74AS113

    Abstract: S113
    Text: PRELIMINARY Semiconductor DM54AS113/74AS113 Dual J-K Negative-EdgeTriggered Flip-Flops with Preset General Description Features The DM54AS113 is a dual-edge-triggered flip -flo p s . Each flip -flo p has individual J, K, clock, and preset inputs, and also com plem entary Q and Q ou tputs.


    OCR Scan     		PDF DM54AS113/DM74AS113 DM54AS113 DM54AS113 DM74AS113 TL/F/6286-2 74AS113 S113

    74aLS808

    Abstract: 74ALS677 74ALS468 SN74AS877 SN74LS630 SM54A NCE 7190 74ls631 SN74LS693 TTL Data Book for Design Engineers
    Text: ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS FUNCTION DEVICE AS1032 ALS1034 AS1034 Quad 2-Input OR Buffers/ Drivers A VAILABILITY NOW NOW NOW Hex Drivers NOW ALS1035 Hex Buffers with D-C Outputs NOW AS1036 Quad 2-Input NOR Line Driver NOW ALS1240


    OCR Scan     		PDF ALS1032 AS1032 ALS1034 AS1034 ALS1035 AS1036 ALS1240 ALS1241 ALS1242 ALS1243 74aLS808 74ALS677 74ALS468 SN74AS877 SN74LS630 SM54A NCE 7190 74ls631 SN74LS693 TTL Data Book for Design Engineers