74LVC00A Search Results

uA311

Abstract: 74LVC00AMTR 74LVC00A 74LVC00ATTR TSSOP14
Contextual Info: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

74LVC00A

Abstract: 74LVC00AD 74LVC00ADB 74LVC00APW
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 1998 Apr 28 2002 Mar 05 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic

74LVC04

Abstract: 74LVC157 74LVC162244A 74LVC00 octal buffer
Contextual Info: Philips Semiconductors Advanced Low Voltage CMOS REPLACEMENT LIST Replacement List LVC TO LVCXXXA LVC PA RT TY P E Function 74LVC00 2-Input NAND Gate speed 74LVC00A 74LVC02 2-Input N O R Gate speed 74LVC02A Improvement Replacement 74LVC04 Hex Inverter Gate

74LVC00AMTR

Abstract: 74LVC00A 74LVC00AM 74LVC00ATTR TSSOP14
Contextual Info: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

Contextual Info: 74LVC00A Quad 2-input NAND gate Rev. 7 — 25 April 2012 Product data sheet 1. General description The 74LVC00A provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

JESD22-C101E

Contextual Info: 74LVC00A Quad 2-input NAND gate Rev. 6 — 6 January 2012 Product data sheet 1. General description The 74LVC00A provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

Contextual Info: 74LVC00A QUADRUPLE 2-INPUT NAND GATES Pin Assignments Description The 74LVC00A provides four independent 2-input NAND gates. The Top View device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be

74LVC00A

Abstract: 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW DHVQFN14 SSOP14 TSSOP14 dhvqfn14 footprint
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 2002 Mar 05 2003 May 07 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic

Contextual Info: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE ADVANCED PERFORMANCE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:

Contextual Info: 74LVC00A Quad 2-input NAND gate Rev. 7 — 25 April 2012 Product data sheet 1. General description The 74LVC00A provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

74LVC00A

Abstract: 74LVC00APW MS-012AB SSOP14 TSSOP14
Contextual Info: Philips Sem iconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • W ide supply range of 1.2V to 3.6V The 74LVC00A is a high-perform ance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible T TL families.

74LVC00AMTR

Contextual Info: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE ADVANCED PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

74LVC00A

Abstract: 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW SSOP14 TSSOP14
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 2003 May 07 2003 Sep 04 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic

Contextual Info: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

Contextual Info: 74LVC00A-Q100 Quad 2-input NAND gate Rev. 1 — 27 February 2013 Product data sheet 1. General description The 74LVC00A-Q100 provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

SV00377

Abstract: 74LVC00A 74LVC00APW
Contextual Info: INTEGRATED CIRCUITS 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 1997 Aug 11 IC24 Data Handbook Philips Semiconductors 1998 Apr 28 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION

74LVC00A

Abstract: 74LVC00APW MS-012AB SSOP14
Contextual Info: Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • Wide supply range of 1.2V to 3.6V The 74LVC00A is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Contextual Info: 74LVC00A QUADRUPLE 2-INPUT NAND GATES Description Pin Assignments NEW PRODUCT The 74LVC00A provides four independent 2-input NAND Top View gates. The device is designed for operation with a power 1A 1 14 Vcc supply range of 1.65V to 5.5V. The inputs are tolerant to

74LVCOOA

Contextual Info: Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • Wide supply range of 1.2V to 3.6V The 74LVC00A is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Contextual Info: 74LVC00A QUADRUPLE 2-INPUT NAND GATES Description Pin Assignments The 74LVC00A provides four independent 2-input NAND gates. The Top View device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be

74LVC00A

Abstract: 74LVC00AM 74LVC00AMTR 74LVC00ATTR TSSOP14
Contextual Info: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

Contextual Info: 74LVC00A Quad 2-input NAND gate 1998 Apr 28 Product specification Supersedes data of 1997 Aug 11 IC24 Data Handbook Philips Semiconductors PHILIPS PHILIPS Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • Wide supply range of 1.2V to 3.6V

LCX06

Abstract: LCX16244 SN74LVCR162245A mc74lcx245 Schmitt Trigger lcx162245 74LVC162244A LCX04 LCX843 LCXH162245 lcx32
Contextual Info: HC Portfolio Comparison PART # LCX00 LCX02 LCX04 LCXU04 LCX05 LCX06 LCX07 LCX08 LCX10 LCX11 LCX14 LCX27 LCX32 LCX38 LCX74 LCX86 LCX109 LCX112 LCX125 LCX126 LCX137 LCX138 LCX139 LCX157 LCX158 LCX161 LCX163 LCX169 LCX240 LCX241 LCX244 LCX245 LCX257 LCX258 LCX273

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference