74LS136 Search Results

M74LS136P

Abstract: 20-PIN MITSUBISHI ELECTRIC SEMICONDUCTOR
Contextual Info: MITSUBISHI LSTTLs M 74LS136P QUADRUPLE 2 -IN P U T EXC LU SIVE OR GATES W IT H OPEN COLLECTOR O UTPU TS DESCRIPTION The M 74LS 136P containing 4 is a semiconductor integrated circuit dual-input exclusive-OR gates w ith PIN CONFIGURATION TOP VIEW open collector output.

Contextual Info: 74LS136 LS TTL DN74LS Series 74LS136 Quad 2 - input E xclusive OR G ates with Open C ollector Outputs • Description P-1 DN 74LS136 contains four 2-input exclusive OR gate circuits w ith open collector outputs. ■ • • • • Features “Wired” AND capability

74LS136PC

Abstract: 54LS136DM 54LS136FM 74LS136DC 74LS136FC 74LS136P
Contextual Info: 136 C O N N E C T IO N D IA G R A M P IN O U T A 54LS/74LS136 QUAD 2-IN P U T EXCLUSIVE-OR GATE With Open-Collector Outputs D O R D E R IN G CO D E: See S e c tio n 9 PIN PKGS OUT C O M M E R C IA L G RADE M IL IT A R Y GRADE V c c = + 5 .0 V ±5%, T a = 0 ° C t o + 7 0° C

Contextual Info: 136 CONNECTION DIAGRAM PINOUT A 54LS/74LS136 6 / r o'? QUAD 2-INPUT EXCLUSIVE-OR GATE With Open-Collector Outputs ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, Ta = 0°C to +70° C Vcc = +5.0 V ±10%, TA = -55° C to +125° C

74ls gate symbols

Abstract: 74ls Logic Family Specifications 74ls TTL family 74ls signetics 74LS 74LS136 N74LS136N
Contextual Info: 74LS136 Signetics Gate Quad Two-fnput Exclusive-OR Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 18ns 6.1mA 74LS136 ORDERING CODE FUNCTION TABLE OUTPUT INPUTS A B Y L L H H L H L H

74ls gate symbols

Abstract: 74ls 74ls signetics 74LS136 N74LS136N 74ls Logic Family Specifications
Contextual Info: Signetics | 74LS136 G ate Quad T w o -In p u t Exclusive-O R Gate Open C o lle cto r Product Specification Logic P rod ucts TY PE T Y P IC A L P R O P A G A T IO N DELAY T Y P IC A L S U P P LY C U R R E N T (T O T A L ) 18ns 6.1m A 74L S 136 FUNCTION TABLE

74LS

Contextual Info: Signelics 74LS136 Gate Quad Two-Input Exclusive-OR Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 18ns 6.1mA 74LS136 ORDERING CODE FUNCTION TABLE OUTPUT INPUTS A B Y L L H H L H L H

74ls Logic Family Specifications

Abstract: 74LS 74LS136 74Ls signetics 74LS 3 input AND gate
Contextual Info: 74LS136 Signetics Gate Quad Two-Input Exclusive-OR Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 18ns 6.1mA 74LS136 ORDERING CODE FUNCTION TABLE INPUTS OUTPUT A B Y L L H H L H L H

Contextual Info: MITSUBISHI LSTTLs M 74LS136P QUADRUPLE 2-IN P U T EXCLUSIVE OR GATES W ITH OPEN COLLECTOR OUTPUTS DESCRIPTION The M 74LS 136P containing 4 is a semiconductor integrated circuit dual-input exclusive-OR gates w ith PIN CONFIGURATION TOP VIEW open collector output.

74LS136N

Contextual Info: 74LS136 Signetics Gate Quad Two-Input Exclusive-OR Gate Open Collector Product Specification Logic Products TYPE T Y P IC A L P R O P A G A TIO N DE LA Y T Y P IC A L SU PP LY C U R R E N T 18ns 6.1m A 74LS 136 ORDERING CODE FUNCTION TABLE INPU TS O U TP U T

SN54136

Contextual Info: TYPES SN54136, SN54LS136, SN74136, 74LS136 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES WITH OPEN-COLLECTOR OUTPUTS D E C E M B E R 1 9 7 2 -R E V IS E D D E C E M B E R 1983 S N 5 4 1 3 6 . S N 54 L S 1 3 6 . . . J OR W PACKAGE F U N C T IO N T A B L E H S N 7 4 1 3 6 . . . J OR N PACKAGE

SN54138

Abstract: IC 74136 74136 sn54ls138 SN54136
Contextual Info: TYPES SN54138, SN54LS136, SN74136. SN741S136 QUADRUPLE 2 INPUT EXCLUSWE OR GATES WITH OPEM-COtLECTOR OUTPUTS TTL MSI _ B U L L E T IN N O . D L -S 7 6 1 1 8 2 7 , D E C E M B E R 1 9 7 2 - B E V I S E D O C T O B E R 1 9 7 6 SN54136, SN 64LS136 . . . J Oft W P A C K A G E

Contextual Info: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES

Contextual Info: Or, Cell Customer Service a 1 1-80Ú-548-6132 USA Only BURR-BROWN DAC811 AVAILABLE IN DIE 00 o < Q Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER 0) DC FEATURES • SINGLE INTEGRATED CIRCUIT CHIP • MICROCOMPUTER INTERFACE: DOUBLE-BUFFERED LATCH

ALU IC 74181

Abstract: 74181 ic pin diagram DS 7409 7480 full adder 1 bit 74LS86 full adder IC 74181 7411 3 INPUT AND gate TTL 74ls83 pin diagram of 7411 logic diagram of 7432
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 Vcc Vcc 1^1FH [iä| [vii Eòi [T| r»1 füi Fai np f i ! Föi lyi rn

HDSC2026

Abstract: b1b16
Contextual Info: ATEL HDSC2026 Four-Quadrant Multiplying SIN/COS DAC Microprocessor Compatible 16-bit Hybrid Features • Single 36-pin hybrid DDIP package • 1 arc-minute accuracy • 0.03% radius accuracy • Microprocessor compatible 8 and 16-bit • Double buffered inputs

74ls29

Abstract: HDSC2306 CD4045 16 PIN COS IC CD4060
Contextual Info: ATEL HDSC2306 Low Cost, Small Size Four Quadrant Multiplying SIN/COS DAC Microprocessor Compatible 16-bit Hybrid Features • 28-pin ceramic DDIP package • 1 arc-minute accuracy • 0.03% radius accuracy • Microprocessor compatible 8 and 16-bit • Double buffered inputs

SR2006-14S

Abstract: 74LS29 SR2006
Contextual Info: HDSR2006 Digital-to-Synchro/Resolver Converter Microprocessor Compatible 16-bit Hybrid Single 36-pin hybrid DDIP package 1 arc-minute accuracy 0.05% max scale factor variation sin, cos conformance 4-quadrant digital-to-sin/cos conversion Microprocessor compatible

SN54136

Contextual Info: SN54136, SN54LS136. SN74136, 74LS136 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES WITH OPEN-COLLECTOR OUTPUTS DECEM BER 1972 - R EV ISED MARCH 1988 SN54136, SN54LS136 . . . J OR W PACKAGE SN74136 . . . N PACKAGE 74LS136 . . . D OR N PACKAGE TOP VIEW FUNCTION TABLE

EMC for PCB Layout

Abstract: CXA10-48D05 IPC-D-275 TNV1 BXA10 CXA10 CXA10-48D12 CXA10-48S05 CXA10-48S12 CXA10-48S3V3
Contextual Info: CXA10 SERIES Application Note 100 1. Introduction 2 2. Models and Features Features 2 3. General Description Electrical Description Physical Construction 2 2 4. Features and Functions Overvoltage Protection Current Limit and Short Circuit Remote On/Off 3 3

k2645

Abstract: k4005 U664B mosfet k4005 MB8719 transistor mosfet k4004 SN16880N stk5392 STR451 BC417
Contextual Info: 1 BHIAB Electronics Du som söker besvärliga IC & transistorer, börja Ditt sökande hos oss – vi har fler typer på lager än man rimlingen kan begära av ett företag Denna utgåva visar lagerartiklar men tyvärr saknas priser och viss information Men uppdatering sker kontinuerligt

EATON CM20A

Abstract: A5 GNE mosfet Hall sensor 44e 402 2N8491 FTG 1087 S TRIAC BCR 10km FEB3T smd transistor marking 352a sharp EIA 577 sharp color tv schematic diagram MP-130 M mh-ce 10268
Contextual Info: Table of Contents N E W A R K E L E C T R O N IC S “Where serving you begins even before you call” Newark Electronics is a UNIQUE broadline distributor of electronic components, dedicated to provid­ ing complete service, fast delivery and in-depth inventory. Our main

LOGIC OF 74LS138

Abstract: pin for 74LS138 74LS138 3 to 8 decoder notes 74LS138 74LS138 pins 74l5138 of 74LS138 3 to 8 decoder 74ls138 function TTL 74ls138 74LS138 3 to 8 decoder Pin
Contextual Info: 74LS138, S138 Signetics Decoders/Dem ultiplexers 1-Of-8 D e co d e r/D e m u ltip le xe r Product Specification L o g ic P rod ucts FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding

LS136

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 5962-9231901M2A ACTIVE LCCC FK