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    7427 LOGIC DIAGRAM Search Results

    7427 LOGIC DIAGRAM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    DCL541A01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: Low / Input disable Visit Toshiba Electronic Devices & Storage Corporation
    DCL542H01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=2:2) / Default Output Logic: High / Output enable Visit Toshiba Electronic Devices & Storage Corporation
    DCL541B01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: High / Input disable Visit Toshiba Electronic Devices & Storage Corporation

    7427 LOGIC DIAGRAM Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    TAG A3

    Abstract: burndy MODULE intel sram CYM7427PB-20 CYM7428PB-20
    Text: CYM7427 CYM7428 ADVANCED INFORMATION 82420 PCIsetĆCompatible Level II Cache Module Family Features D D D D D D D D D Cache size 128 Kbytes or 256 Kbytes Tag width of 7 bits plus valid bit Independent dirty bit Operates with systems based on the Intel 82420 core logic


    Original     		PDF CYM7427 CYM7428 112pin CELP2X56SC3Z48 CYM7427/28 486based CYM7428) CYM7427) CYM7428 TAG A3 burndy MODULE intel sram CYM7427PB-20 CYM7428PB-20

    74LS27

    Abstract: Pin diagram 7427
    Text: J NATIONAL SEIIICOND {LOGIC} DEE D | bSD1122 0Db3bbS 7 | 27 rCO NN ECTIO N DIAGRAM PINOUT A 54/7427 54LS /74LS27 TRIPLE 3-INPUT NOR GATE ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 ±5%, T a = 0 °C to +70° C Vcc = +5.0 V ±10%,


    OCR Scan     		PDF bSD1122 /74LS27 7427PC, 74LS27PC 7427DC, 74LS27DC 7427FC, 74LS27FC 5427DM, 54LS27DM 74LS27 Pin diagram 7427

    IC 7486

    Abstract: CI 74LS08 TTL 7408 IC TTL 7432 7408 TTL TTL 74ls08 7408 ic diagram IC TTL 7402 IC 7432 74LS32 TTL
    Text: FA IR C H ILD D IG ITA L TTL High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2’ S U. High Speed 54H/74H 6 ns/22 mW c B £ Std. TTL 54/74 10 ns/10 mW o o 54/7402 — 54S/74S02 D10 — — — — D11 4L,6B 54LS /74LS 27 54/7427 — — D12


    OCR Scan     		PDF ns/10 54LS/74LS 54H/74H ns/22 54S/74S ns/19 54LS/74LS02 54S/74S02 54LS/74LS27 IC 7486 CI 74LS08 TTL 7408 IC TTL 7432 7408 TTL TTL 74ls08 7408 ic diagram IC TTL 7402 IC 7432 74LS32 TTL

    TTL LS 7407

    Abstract: CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 D9 54S/74S134 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I E RRRRRRRFl li lli lli lli J lill ill ill iJGND


    OCR Scan     		PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7407 CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02

    TTL LS 7407

    Abstract: TTL 7427 TTL 7402 LS 7430 LS 7402 74LS02 74LS30 ttl 7407 d1554 TTL 74s02
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I 5T5 R Fl R R R FI FI aia LU 111 111 Li] lij lil L J


    OCR Scan     		PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7407 TTL 7427 TTL 7402 LS 7430 LS 7402 74LS02 74LS30 ttl 7407 d1554 TTL 74s02

    74LS08 Quad 2-Input AND Gates

    Abstract: TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11
    Text: FAIRCHILD DIGITAL TTL High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2’ E £ Std. TTL 54/74 10 ns/10 mW ~c o o c S U. Low Power Schottky 54LS/74LS 5 ns/2 mW Cont’d 9000 Series 8 ns/10 mW SSI FUNCTIONS 5


    OCR Scan     		PDF ns/10 54H/74H ns/22 54S/74S ns/19 54LS/74LS 54LS/74LS02 54LS/74LS27 54LS/74LS260 74LS08 Quad 2-Input AND Gates TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11

    CI 7408

    Abstract: 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86
    Text: FAIRCHILD DIGITAL TTL Quad 2-Input 9015 3 Triple 3-Input — 4 Dual 4-Input w/Strobe — 5 Dual 4-Input Exp — 6 Dual 5-Input — Logic/Connection Diagram12* 2 High Speed Schottky 54S/74S 3 ns/19 mW — 3 LL High Speed 54H/74H 6 ns/22 mW Quad 2-Input E


    OCR Scan     		PDF ns/10 54LS/74LS 54H/74H ns/22 54S/74S ns/19 54LS/74LS02 54S/74S02 54LS/74LS27 CI 7408 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86

    7411 pin diagram

    Abstract: TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 r ei fi r E5i r?i n Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lo b lib lo c lie lo d lid S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16


    OCR Scan     		PDF 54LS/74LS379 74LS266, 54LS/74LS386 54LS/74LS398 54LS/74LS399 54LS/74LS574 54LS/74LSS02 O04S09 54LS/74LS11 54H/74H11 7411 pin diagram TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08

    CI 7408

    Abstract: CI 74LS08 TTL 74ls21 74LS21 7407 connection diagram 54LS CI 7413 7432 TTL fairchild 74LS125 7408 and
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L - T T L D65 54/7413, 54LS/74LS13 Vcc NC R R R fü| FÖI f71 r«l D66 54/74125, 54LS/74LS125 D67 54/74126, 54LS/74LS126 Vcc Vcc äJ QND E D68 54LS/74LS365 j y E D O 3X 5 rn m D O E D D O E D O IPTJ? ~ ? f i r


    OCR Scan     		PDF 54LS/74LS13 54LS/74LS125 54LS/74LS126 54LS/74LS365 54LS/74LS366 54LS/74LS367 54LS/74LS368 I4S09 54LS/74LS11 54H/74H11 CI 7408 CI 74LS08 TTL 74ls21 74LS21 7407 connection diagram 54LS CI 7413 7432 TTL fairchild 74LS125 7408 and

    CI 74LS08

    Abstract: 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi


    OCR Scan     		PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, CI 74LS08 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild

    TH 82420

    Abstract: No abstract text available
    Text: CYPRESS ADVANCED INFORMATION 82420 PCIset-Compatible Level II Cache Module Family Features Functional Description • C ac h e size 128 K bytes o r 256 K bytes • T ag w id th o f 7 b its p lu s valid b it • I n d e p e n d e n t d irty b it • O p e ra te s w ith system s b a s e d on th e


    OCR Scan     		PDF 112-pin CYM7427 CYM7428 CYM7428) CYM7427) TH 82420

    TTL LS 7406

    Abstract: el 7406 74l804 ls 7404 7404 ls 74114 ic 74132 IC 7404 IC TTL 7402 TTL IC 7405
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I Vcc E RRRRRRRFl LiJ ikj Lil l±J UJ LsJ IzJ GND LU D11


    OCR Scan     		PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7406 el 7406 74l804 ls 7404 7404 ls 74114 ic 74132 IC 7404 IC TTL 7402 TTL IC 7405

    logic diagram of 7432

    Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn


    OCR Scan     		PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, logic diagram of 7432 CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL

    logic diagram of ic 7427

    Abstract: No abstract text available
    Text: TYPES SN5427, SN54LS27, SN7427. SN74LS27 TRIPLE 3-INPUT POSITIVE-NOR GATES R E V ISE D D EC EM B ER 1983 Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs S N 5 4 2 7 . S N 5 4 L S 2 7 . . J O R W P A C K A G E


    OCR Scan     		PDF SN5427, SN54LS27, SN7427. SN74LS27 logic diagram of ic 7427

    intel sram

    Abstract: 7427 logic diagram
    Text: CYM7427 CYM7428 ADVANCED INFORMATION 82420 PCIset-Compatible Level II Cache Module Family Features Functional Description • • • • The CYM7427/28 module series is a fam­ ily of cache memory subsystems for Intel 486-based systems. The CYM7427 128 Kbytes contains one memory bank orga­


    OCR Scan     		PDF CYM7427 CYM7428 112-pin CELP2X56SC3Z48 CYM7427/28 486-based CYM7427 CYM7428) CYM7427) intel sram 7427 logic diagram

    Intel 82420

    Abstract: TTL 7427 burndy MODULE burndy 12 pin intel sram burndy 7427 logic diagram 486-BASED power bank 5v 82420
    Text: F# CYPRESS ADVANCED INFORMATION 82420 PCIset-Compatible Level II Cache Module Family Features Functional Description • • • • The CYM7427/28 module series is a fam­ ily of cache memory subsystems for Intel 486-based systems. The CYM7427 128 Kbytes contains one memory bank orga­


    OCR Scan     		PDF CYM7427 CYM7428 112-pin CELP2X56SC3Z48 CYM7427/28 486-based CYM7427 20-nanosecond Intel 82420 TTL 7427 burndy MODULE burndy 12 pin intel sram burndy 7427 logic diagram power bank 5v 82420

    54LS27

    Abstract: logic diagram of ic 7427 triple 3-input nor gate
    Text: SN5427, SN54LS27, SN7427, SN74LS27 TRIPLE 3-INPUT POSITIVE-NOR GATES D EC EM B ER 1 9 0 3 -R E V IS E D M A R C H 1988 [ • Package Options Include Plastic "S m a ll O utline" Packages« Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic D IPs


    OCR Scan     		PDF SN5427, SN54LS27, SN7427, SN74LS27 SN5427 54LS27 SN7427 74LS27 logic diagram of ic 7427 triple 3-input nor gate

    pin diagram of 7428

    Abstract: No abstract text available
    Text: oi •Nj < 9 National Cd Semiconductor 54F/74F573 Octal D-Type Latch with TRI-STATE Outputs General Description Features The 'F573 is a high speed octal latch with buffered common Latch Enable LE and buffered common Output Enable (<5E) inputs. ■ Inputs and outputs on opposite sides of package


    OCR Scan     		PDF 54F/74F573 74F573PC 54F573DM 74F573SC 74F573SJ 54F573FM 54F573LM pin diagram of 7428

    ttl crystal oscillator using CIRCUIT DIAGRAM 7404

    Abstract: ttl crystal oscillator using 7404 74121 application as pulse generator ZNA134J 2NA134J ZNA134 7493 logic diagram 1135l diagram of cctv camera ttl crystal oscillator using CIRCUIT DIAGRAM
    Text: PLESSEY SEMICONDUCTORS 1SE D 7220S13 QQQTSTfc, T P LE S S E Y Semiconductors Z N A 134J CCIR/EIA TV SYNCHRONISING PULSE GENERATOR FEATURES • 625 and 525 line standards. • CCIR and EIA standard outputs. • Single 5 vo lt supply, fu lly TTL compatible.


    OCR Scan     		PDF 7220S13 ZNA134J ZNA134 T-77-07-13 ttl crystal oscillator using CIRCUIT DIAGRAM 7404 ttl crystal oscillator using 7404 74121 application as pulse generator ZNA134J 2NA134J 7493 logic diagram 1135l diagram of cctv camera ttl crystal oscillator using CIRCUIT DIAGRAM

    ZNA134J

    Abstract: application circuits of ic 74121 74121 full internal circuit diagram ZNA134 229FJ 7404 sl 74121
    Text: PLESSEY S EM ICON DU CT OR S 1SE D 7220S13 QQQTSTfc, T P L E S S E Y Sem icon du ctors Z N A 1 3 4 J CCIR/EIA TV SYNCHRONISING PULSE GENERATOR FEATURES • 625 and 525 line standards. • CCIR and EIA standard outputs. • Single 5 vo lt supply, fu lly TTL compatible.


    OCR Scan     		PDF 7220S13 ZNA134 ZNA134J ZNA134J application circuits of ic 74121 74121 full internal circuit diagram 229FJ 7404 sl 74121

    ttl crystal oscillator using 7404

    Abstract: No abstract text available
    Text: GEC P L E S S E Y s e m i c o n d u c t o r s ] 3104-1.0 ZNA134 CCIR/EIA TV SYNCHRONISING PULSE GENERATOR FEATURES • 625 and 525 line standards. • CCIR and EIA standard outputs. • Single 5 volt supply, fully TTL compatible. • Easy synchronising betw een generators.


    OCR Scan     		PDF ZNA134 ZNA134 ttl crystal oscillator using 7404

    equivalent transistor K 2767

    Abstract: 1N3064 SN54278 SN74278
    Text: SNS4278. SN74278 4-BIT CASCADABLE PRIORITY REGISTERS MAY 1972 —REVISED MARCH 1988 Latched Data inputs Serve as Buffer Register and Can also: Synchronize Data Acquisition "Debounce" Mechanical Switch Input SN5 4 2 7 8 . . . J OR W PACKAGE S N 7427 8 . . . N PACKAGE


    OCR Scan     		PDF SN54278, SN74278 SN54278 SN74278 equivalent transistor K 2767 1N3064

    4p1c

    Abstract: logic diagram of ic 7427
    Text: SN54278, SN74278 4 BIT CASCADABLE PRIORITY REGISTERS M A Y 1 9 7 2 — R E V IS E D M A R C H 1 9 8 8 Latched Data Inputs Serve as Buffer Register and Can also: Synchronize Data Acquisition "Debounce" Mechanical Switch Input SN5 4 2 7 8 . . . J OR W PACKAGE


    OCR Scan     		PDF SN54278, SN74278 4p1c logic diagram of ic 7427

    IC 7402, 7404, 7408, 7432, 7400

    Abstract: TTL IC 7405 7400 logic gate ic IC AND GATE 7408 ic 7400 logic symbol 7408 AND GATE fan in 9N01 IC 7400 nand gate 7408, 7404, 7486, 7432 IC 7404 hex inverter
    Text: SSI • GATES, BUFFERS AND INVERTERS LOW POWER tpcj = 20 ns Pd = 2 mW per Gate STANDARD tpd = 10 ns Pd = 10 mW per Gate 0°C to +70° C and -5 5 ° to +125°C 0° to +70° C -5 5 ° t o +125° C 9 L00 9N00/7400 9N00/5400 9N01/7401 9N01/5401 9N03/7403 9N03/5403


    OCR Scan     		PDF 9N00/7400 9N01/7401 9N03/7403 9N26/7426 9N10/7410 9N12/7412 9N20/7420 9N30/7430 9N00/5400 9N01/5401 IC 7402, 7404, 7408, 7432, 7400 TTL IC 7405 7400 logic gate ic IC AND GATE 7408 ic 7400 logic symbol 7408 AND GATE fan in 9N01 IC 7400 nand gate 7408, 7404, 7486, 7432 IC 7404 hex inverter