74 SERIES NAND GATE Search Results

7430N

Abstract: FJH101 FJH101A fjh-101 6430N D1110 FJH106 H101
Contextual Info: T.T.L. SINGLE 8-INPUT NAND GATES FIHIOI FJHIOIA Correspond to 74 Series types 7430N, 6430N FJHI06 TENTATIVE DATA These devices are tran sistor-tran sistor logic single 8-input NAND gates in the FJ s e r ie s of integrated c ircu its. The FJH101 corresponds to '74 Series' type 7430N,

AND-OR-INVERT gate

Abstract: 74 series family 74 series inverter
Contextual Info: BIPOLAR DIGITAL ICs continued •o 4->a 5 D Q. • PACKAGE C FANOUT DESCRIPTION TYPE TTL-T 74 H, T 54 H series" T 74/54 H 00 Quad 2-input positive NAND gate 6 90 10 T 74/54 H 04 Hex inverter 8 140 10 DIP H,P DIP H,P T 74/54 H 05* Hex inverter w ith open collector

Contextual Info: LS TTL DN74LS Series DN74LS22 DN74LS22 bio 74.LS Q Dual 4-input P ositive NAND Gates with Open Collector Outputs • Description P-1 DN74LS22 contains two 4-input positive isolation NAND gate circuits w ith open collector outputs. ■ Features • • •

Contextual Info: DM9003C fjWA National J u i Semiconductor \ DM9003C Triple 3-Input NAND Gates General Description For the new designs, the 54/74 fam ilies o f TTL c ircu its o f­ fer the industry's broadest choice of high-performance d igita l circuits. Series 54/74 pin-for-pin equivalent is

MA161

Abstract: DN74LS38 s0140
Contextual Info: L S T T L DN74LS Series DN74LS38 D N 74LS38 bM 74- L-S S'? Quad 2-input P ositive NAND B u ffers with Open C ollector Outputs • Description D N 74LS38 contains four 2-input positive isolation NAND buffer gate circuits with open collector outputs. P-1 H Features

DN74LS20

Abstract: MA161
Contextual Info: LS T T L DN74LS Series DN74LS20 DN74LS20 5 rO 74 U 5U3 Dual 4 - input P o sitiv e NAND Gates H Description P-1 DN74LS20 contains two 4-input positive isolation NAND gate circuits. I Features • • • • Low power consumption Pd = 4m W typical High speed (tpd = 10ns typical)

7410N

Abstract: 2 input nand gate 24v FJH121 FJH121A 121-Page 6410N FJH106 FJH126 2 input nor gate 24v
Contextual Info: FIHI2I FJHI2IA T.T.L. TRIPLE 3-INPUT NAND GATES Correspond to 74 Series types 7410N, 6410N FJHI26 TENTATIVE DATA T hese d e v ic es a re tr a n s is to r - tr a n s is to r logic tr ip le 3-input NAND g ates in the F J s e r ie s of in te g rate d c ir c u its . The FJH121 c o rre sp o n d s to '74 S e rie s ' type 7410N,

7410N

Abstract: pin diagram for all 74 series ttl gates FJH121 6410N FJH121A 74 series logic gates ttl NAND gate circuit FJH106 FJH126 NAND Gates
Contextual Info: T.T.L. TRIPLE 3-INPUT NAND GATES FIHI2I FJH I2IA Correspond to 74 Series types 7410N, 6410N FJHI26 TENTATIVE DATA T hese d e v ic es a re tr a n s is to r - tr a n s is to r logic tr ip le 3-input NAND g ates in the F J s e r ie s of in te g rate d c ir c u its . The FJH121 c o rre sp o n d s to '74 S e rie s ' type 7410N,

MM74C30N

Abstract: MM54C30J MM74C30 MM54C30 MM74C30J AN-90 C1995 J14A
Contextual Info: MM54C30 MM74C30 8-Input NAND Gate General Description Features The logical gate employs complementary MOS CMOS to achieve wide power supply operating range low power consumption and high noise immunity Function and pin out compatibility with series 54 74 devices minimizes design

PO74G10A

Contextual Info: PO74G10A www.potatosemi.com TRIPLE 3-INPUT POSITIVE-NAND GATES 54, 74 Series Noise Cancellation GHz Logic FEATURES: DESCRIPTION: . Patented technology . Operating frequency up to 1GHz with 2pf load . Operating frequency up to 800MHz with 5pf load . Operating frequency up to 350MHz with 15pf load

74 series

Abstract: Potato Semiconductor 74 Series Logic ICs CERAMIC LEADLESS CHIP CARRIER A115-A C101 PO54G00A PO74G00A PO74G00ASR PO74G00ASU
Contextual Info: PO54G00A, PO74G00A QUADRUPLE 2-INPUT POSITIVE-NAND GATE 09/12/07 54, 74 Series GHz Logic FEATURES: DESCRIPTION: . Patented technology . Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C . Operating frequency up to 1.125GHz with 2pf load

PO74G00A

Contextual Info: PO54G00A, PO74G00A www.potatosemi.com QUADRUPLE 2-INPUT POSITIVE-NAND GATE 54, 74 Series Noise Cancellation GHz Logic FEATURES: DESCRIPTION: . Patented technology . Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C . Operating frequency up to 1.125GHz with 2pf load

Contextual Info: UNITED MICROELECTRONICS 0e! .9325812 ÏÊ| 1325012 0000200 Q | U N ITED MICROELECTRONICS 890 00288 U A 1300 SERIES |Gate Arrays } = Features • Silicon-gate 2.0 micron drawn double metal HCMOS technology. ■ Speeds higher than 74/TT L-1.7ns through 2-input NAND gate and interconnection,

TSSOP14

Abstract: 74hc132y
Contextual Info: M74HC132 Quad 2-input Schmitt NAND gate Datasheet - production data • Wide operating voltage range: VCC opr = 2 V to 6 V • Pin and function compatible with 74 series 132 SO14 TSSOP14 • ESD performance – HBM: 2 kV – MM: 200 V – CDM: 1 kV Description

SN7439

Abstract: n5439
Contextual Info: TYPES SN5439, SN7439 QUADRUPLE 2-INPUT POSITIVE NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS REVISED M A V 1983 SN5439 . J PACKAG E Current Sinking Capability up to 80 mA SN7439 . J OR N PACKAG E Guaranteed Fan-Out of 30 Series 54/74 Loads ÎT O P V IEW

DN74LS40

Abstract: MA161
Contextual Info: LS T T L DN74LS Series DN74LS40 DN74LS40 [O-74.LS4 Dual 4 - input P o sitiv e N AN D B uffers • Description P-1 DN 74LS40 contains tw o 4-input positive isolation NAND b u ffer gate circuits. ■ Features • • • • High fan-out IOL = 24m A , IOH = - 1 ,2m A

7403N

Abstract: pin diagram for all 74 series ttl gates FJH291 FJH291A nor gate 24v supply FJH29I
Contextual Info: T.T.L. QUADRUPLE 2-INPUT POSITIVE NAND GATES FJH29I FJH29IA Corresponds to 74 Series type 7403N PR O V ISIO N A L DATA T hese d evices a r e tr a n s is to r - tr a n s is to r logic quadruple 2-input p o sitiv e NAND g a te s, w ith a single-ended open c o lle cto r output tra n s is to r , in the F J s e r ie s of in te g rate d

74 LS 00 Nand Gates

Contextual Info: LS T T L DN74LS Series DN74LS26 DN74LS26 J>M 74 l -i 2^ Quad 2 - input High-Voltage Interface P ositive NAND Gates I Description D N 7 4 L S 2 6 c o n ta in s b u ffe r gate c irc u its. P-1 fo u r 2 -in p u t p o sitiv e iso la tio n N A N D I Features •

Contextual Info: SN5439, SN7439 QUADRUPLE 2-INPUT POSITIVE NAND BUFFERS WITH OPEN COLLECTOR OUTPUTS MAY • SN 5439. SN 7439 C urrent Sinking Capability up to 80 m A G uaranteed Fan-O ut of 30 Series 54/74 Loads • i y C 1 1A C 988 . J P AC KA G E N P AC KA G E i b These devices contain four independent 2-input NA ND

DN74LS22

Contextual Info: LS TTL DN74LS Series DN74LS22 DN741S22 bio 74. l S Q 2^ Dual 4-input P ositive NAND Gates with Open Collector Outputs • Description P-1 D N 7 4 L S 2 2 c o n ta in s tw o 4 -in p u t p o sitiv e is o la tio n N A N D gate c irc u its w ith o p e n c o lle c to r o u tp u ts .

ha 1452

Abstract: 7401N FJH231A truth table NAND gate 74 FJH231 ft 5777 2 input nor gate 24v Transistor B 1566
Contextual Info: FJH23I FJH23IA T.T.L. QUADRUPLE 2-INPUT POSITIVE N A N D GATES Corresponds to 74 Series type 7401N TEN TA TIV E DATA T hese dev ices a re tr a n s is to r - tr a n s is to r logic quadruple 2-input positive NAND g a te s , with a sin g le-en d ed open c o lle cto r output t r a n s is to r , in the F J s e r ie s of in te g rate d

7400N

Abstract: 2 input nand gate 24v D1113 FJH131 FJHI36 6400N FIH131 FJH131A FJH136 2 input nor gate 24v
Contextual Info: T.T.L. QUADRUPLE 2-INPUT NAND GATES Correspond to 74 Series types 7400N, 6400N FIH13 1 FJHI3IA FJHI36 T ENTATIVE DATA T h e s e d e v ic e s a r e t r a n s i s t o r - t r a n s i s t o r lo g ic q u a d ru p le 2 -in p u t NAND g a te s in th e F J s e r i e s of in te g r a te d c i r c u i t s . T h e F JH 131 c o r r e s p o n d s to '7 4 S e r i e s 't y p e 7400N,

7401AN

Abstract: FJH311 FJH311A pin diagram for all 74 series ttl gates transistor KJJ
Contextual Info: T.T.L. Q U A D R U P L E 2 -IN P U T P O S IT IV E N A N D G A T E S F IH 3 M F J H 3 IIA Corresponds to 74 Series type 7401AN PR O V IS IO N A L D A T A T hese dev ices a r e t r a n s is to r - tr a n s is to r logic quadruple 2-input p o sitiv e NAND g a te s ,

16-LINE TO 4-LINE PRIORITY ENCODERS

Abstract: 74 series logic gates Flip flops "J-K Flip flops" J-K Flip flops NAND Gates HD74 Synchronous 8-Bit Binary Counters HD74S synchronous binary counter with latch
Contextual Info: o V o la i \ \_ a . TTL H D 74/H D 74S Series I M A IN C HARACTERISTICS I PERFORMANCE (per gate Performance HD74 Series HD74S Series Propagation 10 ns 3 ns Delay Time Power 10 mW 20 m\V Dissipation Speed-Power 100 pJ 60 pJ Product O Series Param eter max)