74 LS 151 LOGIC DIAGRAM Search Results

74 LS 151 Logic DIAGRAM

Abstract: 74LS151 multiplexer truth table 74LS151 truth table
Contextual Info: M M O T O R O L A SN54/74LS151 8-INPUT MULTIPLEXER The TTL/MSI SN5 4 / 74 LS 151 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS 151 can be used as a universal function generator to

SRG8

Abstract: 74als165
Contextual Info: TYP ES S N 5 4 A LS 16 S , S N 74 A LS 16 5 P A R A LLE L LO AD 8-BIT SH IFT REGISTERS D 2 6 6 1 , JU N E 1982 Complementary Outputs I• • SN 54A LS 165 . . . J PACKAGE S N 74A LS 165 . . . N PACKAGE Direct Overriding Load Data Inputs (TOP VIEW) Gated Clock Inputs

74LS73A

Contextual Info: M M O TO R O LA SN54/74LS73A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS/74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may

LS 74151

Abstract: 74151 16 to 1 74151 waveform 74151 74151 PIN DIAGRAM for multiplexer circuit 74151 PIN DIAGRAM multiplexers 74 LS 151 74151 8 by 1 Multiplexer 74151 pin configuration 74LS151
Contextual Info: 74151, LS151, S151 Signetics Multiplexers 8-Input Multiplexer Product Specification Logic Products FEATURES TYPICAL PROPAGATION DELAY ENABLE TO Y TYPICAL SUPPLY CURRENT (TOTAL) 74151 18ns 29mA 74LS151 12ns 6mA 74S151 9ns 45mA TYPE • Multifunction capability

74F381DC

Abstract: 74 LS 151 Logic DIAGRAM
Contextual Info: M MOTOROLA MC54F381 MC74F381 A dvance Inform ation 4-BIT ARITHMETIC LOGIC UNIT 4-BIT ARITHM ETIC LOGIC U N IT FAST “ SCHOTTKY TTL DESCRIPTION — The MC54F/74F381 performs three arithmetic and three logic operations on two 4-bit words, A and B. Two additional Select input codes force the Function outputs LOW or

74ALS526

Abstract: 74ALS528 SN74ALSM 74ALS52 113P10
Contextual Info: SN54ALS526, S N 54 ALS5 27. SN54ALS52B SN 74ALS52 6, S N 7 4 A L S 5 2 7 , SN 74ALS528 FUSE P R O G R AM M A B LE IDENTITY C OM PARATORS _D 2 8 2 6 , J U N E 1 9 8 4 - * Reduces Board and Package Size for Similar Fixed Comparator Functions

74as175

Abstract: texas instruments of ic 74 ls 83 54AS174 IC sn 74 ls 83 54ALS175 54als174
Contextual Info: TYPES SN 54A LS174, SN 54ALS17S, SIU54AS174, SN 54 A S17S SN 74A LS174, SN 74A LS175, SN 74A S 174, SN 74 A S 175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR D 2 6 6 1 , APRIL 1 9 8 2 - REVISION DECEMBER 1 9 8 3 'ALS174 and 'A S 174 Contain Six Flip-Flops with

IC LOGIC 74150

Abstract: IC 74150 74151A multiplexers TTL 74150 ttl IC 74150 74s151 multiplexers 74 LS 151 54151A
Contextual Info: SN 54150, S N 54151A , SN 54LS151, SN 54S151, SN 74150, SN 74151A , S N 7 4 LS 1 51, SN 74S151 DATA SELECTORSIMULTIPLEXERS DECEMBER 1 9 7 2 -R E V IS E D M AR C H 1 9 6 8 • SN 54150 . '1 5 0 Selects One-of-Sixteen Data Sources . J OR W PACKAGE S N 7 4 1 5 0 . . . N PACKAGE

74ALS541A

Contextual Info: TYPES SN54ALS540, SN54ALS541, SN74ALS540, SN74ALS541 OCTAL BUFFERS AND LINE DRIVERS WITH 3 STATE OUTPUTS D2661. APRIL 1982-REVISED DECEMBER 1983 3-S tate Outputs Drive Bus Lines or Buffer Mem ory Address Registers S N 5 4 A L S 5 4 0 , S N 5 4 A L S 5 4 1 . . . J PACKAGE

LS575

Abstract: SN74ALS574 74AS574
Contextual Info: T YP E S S N 54ALS5 74, SN 54ALS5 75 . S N 5 4AS 5 74 , SN54AS575 S N 7 4 A L S 5 7 4 , S N 74 A L S 5 7 5 , S N 7 4 A S 5 7 4 , SN 74A S 5 75 O CTAL D T Y P E EDGE TRIGGERED FLIP FLOP S WITH 3-STATE OUTPUTS D 2661, JUNE 1982 —REVISED DECEMBER 1983 3-S tate Buffer-Type Noninverting Outputs Drive

74151 mux

Abstract: circuit diagram of MUX 74151 MUX 74151 LS 74151 of MUX 74151 74151 8 by 1 Multiplexer TTL 74151 74151 PIN DIAGRAM 74151 MUX 74LS151
Contextual Info: 74151, LS151, S151 Signetics Multiplexers 8-Input Multiplexer Product Specification Logic Products FEATURES • Multifunction capability • Complementary outputs • See '251 for 3-state version DESCRIPTION Th e '151 is a logical im plem entation of a single-pole, 8-position switch with the

20041A

Abstract: Si2128
Contextual Info: LeadFree a P ckage Options Available! ispLSI 2128/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS fmax = 100 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay • IN-SYSTEM PROGRAMMABLE D0 C7 A1 C6

Contextual Info: LeadFree a P ckage Options Available! ispLSI 2128/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS fmax = 100 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay • IN-SYSTEM PROGRAMMABLE D0 C7 A1 ES

E2633

Abstract: 2128A Si 21 C28E
Contextual Info: ispLSI 2128/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS fmax = 100 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay • IN-SYSTEM PROGRAMMABLE D0 C7 A1 C6 A2 A3 Logic Array A4 A5 D Q D Q D Q

Contextual Info: GD54/74HC151, GD54/74HCT151 8-T0-1 LINE DATA SELECTOR/MULTIPLEXER General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 1 5 1 . This circuit selects one of the 8 binary data inputs, depending on the address presented on the A, B, and C inputs. It features both

pin configuration IC 74151

Abstract: Multiplexer IC 74151 74151 PIN DIAGRAM for multiplexer circuit ic 74151 ic 74151 specification pin configuration pin diagram of ic 74ls151 74151 8 by 1 Multiplexer pin diagram of ic 74151 74151 ls151
Contextual Info: 74151, LS151, S151 Signelics Multiplexers 8-Input Multiplexer Product Specification Logic Products FEATURES • Multifunction capability • Complementary outputs • See '251 for 3-state version DESCRIPTION The '151 is a logical implementation of a single-pole, 8-position switch with the

74ALS223

Abstract: 74ALS22
Contextual Info: S N 74 A LS 2 2 3 3 64 x 9 AS Y N C H R O N O U S FIRST-IN FIRST-O UT M EM O R Y D 3 0 9 2 . FEBRUARY 1 9 8 8 - R E V IS E D APRIL 1 9 8 8 • Independent Asynchronous Inputs and Outputs • 6 4 Words by 9 Bits • Data Rates from 0 to 4 0 MHz DO C 2 27 II q o

Contextual Info: S G S-THOn-SON D7E D | 7^237 Q01L.3SS 3 | ;ai LOW POWER SCHOTTKY INTEGRATED CIRCUITS ' •- T54LS39Ó/393 Ì T74LS390/393 1 ! %. *• I Ì " *’ V 67C 1 5 4 8 4 D : ‘ v ' : V " '- *■ 7 = DUAL DECADE COUNTER DUAL 4-STAG E BINARY COUNTER

LS763

Abstract: 54ALS76
Contextual Info: SN 54ALS76 2, SN 54ALS76 3, SN54AS762, SN54AS763 S N 74 A L S 76 2 , S N 74 A L S 76 3 , S N 74 A S 7 6 2 , SN 74 AS763 OCTAL BUFFERS AN D LINE DRIVERS WITH OPEN-COLLECTOR OUTPUTS DECEMBER 1983-REVISED MAY 1986 S N 5 4 A L S ', S N 5 4 A S ' . . . J P A C K A G E

SN74AS841

Contextual Info: SN54ALS841, SN54AS841, SN54ALS842, SIU54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS D 2 9 1 0 , DECEMBER 1 9 8 3 - TO P VIEW Bus-Structured Pinout oc C ' 1D C 2 Provide Extra Bus Driving Latches

Contextual Info: I-Cube’ LSlOO Quad-Port Ethernet Switch Interface & Features Description • Integrated PCI bus interface for port management • Integrated memory controller and buffer manager • Integrated 64 entry address translation cache • Integrated port statistics collection

EPM7160

Abstract: EPM7160 PLCC CN-TC01 H6062
Contextual Info: ALTERA CORP bfiE D • 05^5375 G003253 013 H A L T EPM7160 EPLD Features ^ □ □ □ □ □ High-density, erasable CMOS EPLD based on second-generation MAX architecture 3,200 usable gates Combinatorial speeds with tPD = 12 ns Counter frequencies up to 90.9 MHz

schmitt trigger using ic 741

Abstract: ic TTL 74121 SN74121 74121 full internal circuit diagram
Contextual Info: SN54121, SN74121 MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS MAY 1983 - REVISED MARCH 1988 SN 54121 . . . J OR W PA CKAGE Programmable Output Pulse Width With Rjn t . . . 35 ns Typ With Rext/Ce x t . . . 40 ns to 28 Seconds SN 74121 . . . N PA CKAGE

Contextual Info: SN 54H C 15 1, SN 74H C 15 1 8 U N E TO 1-LINE D A TA SELEC TORS/M U LTIPLEXERS D 2 6 8 4 . DECEMBER 1 9 8 2 -R E V lS E D SEPTEMBER 1 9 8 7 8-Line to 1-Line Multiplexers Can Perform as: Boolean Function Generators Parallel-to-Serial Converters Data Source Selectors